diff options
| author | Marek Olšák <[email protected]> | 2016-06-24 02:17:38 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-06-24 17:36:43 +0200 |
| commit | 28d0d0c5b4ba9e636b540fafa3b9b2157e848757 (patch) | |
| tree | 20960d753d774cdd02b35f99266eef56196619d5 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | 0d638f4b3d2ff9c5a00828bd3d6743d1a70cf8be (diff) | |
radeonsi: fix fractional odd tessellation spacing for Polaris
ported from Vulkan (and no source explains why this is needed)
Cc: 12.0 <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 7e09c8da1a5..03a688c8685 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3866,7 +3866,8 @@ static void si_init_config(struct si_context *sctx) si_pm4_set_reg(pm4, R_028424_CB_DCC_CONTROL, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) | S_028424_OVERWRITE_COMBINER_WATERMARK(4)); - si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); + if (sctx->b.family < CHIP_POLARIS10) + si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); vgt_tess_distribution = |