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authorSamuel Pitoiset <[email protected]>2017-07-03 16:06:44 +0200
committerSamuel Pitoiset <[email protected]>2017-08-22 11:34:29 +0200
commitc2dfa9b1114db660547eca8bcdf32374313b6a04 (patch)
tree4886bae62ed5b2f0eb612954083933d790e27d07 /src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
parent50349f404d3e4153c364f21ddc24a57060020003 (diff)
radeonsi: use slot indexes for bindless handles
Using VRAM address as bindless handles is not a good idea because we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize because it has no information about the pointer. Instead, use slots indexes like the existing descriptors. Note that we use fixed 16-dword slots for both samplers and images. This doesn't really matter because no real apps use image handles. This improves performance with DOW3 by +7%. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index f8c99ff7e77..1e44b68b860 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -205,15 +205,22 @@ image_fetch_rsrc(
}
if (image->Register.File != TGSI_FILE_IMAGE) {
+ /* Bindless descriptors are accessible from a different pair of
+ * user SGPR indices.
+ */
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
- LLVMValueRef ptr =
- lp_build_emit_fetch_src(bld_base, image,
- TGSI_TYPE_UNSIGNED64, 0);
- rsrc_ptr = LLVMBuildIntToPtr(builder, ptr,
- si_const_array(ctx->v8i32, 0), "");
- index = LLVMConstInt(ctx->i32, 0, 0);
+ rsrc_ptr = LLVMGetParam(ctx->main_fn,
+ ctx->param_bindless_samplers_and_images);
+ index = lp_build_emit_fetch_src(bld_base, image,
+ TGSI_TYPE_UNSIGNED, 0);
+
+ /* For simplicity, bindless image descriptors use fixed
+ * 16-dword slots for now.
+ */
+ index = LLVMBuildMul(builder, index,
+ LLVMConstInt(ctx->i32, 2, 0), "");
}
*rsrc = si_load_image_desc(ctx, rsrc_ptr, index,
@@ -1213,15 +1220,13 @@ static void tex_fetch_ptrs(
}
if (reg->Register.File != TGSI_FILE_SAMPLER) {
- struct gallivm_state *gallivm = &ctx->gallivm;
- LLVMBuilderRef builder = gallivm->builder;
-
- LLVMValueRef ptr =
- lp_build_emit_fetch_src(bld_base, reg,
- TGSI_TYPE_UNSIGNED64, 0);
- list = LLVMBuildIntToPtr(builder, ptr,
- si_const_array(ctx->v8i32, 0), "");
- index = LLVMConstInt(ctx->i32, 0, 0);
+ /* Bindless descriptors are accessible from a different pair of
+ * user SGPR indices.
+ */
+ list = LLVMGetParam(ctx->main_fn,
+ ctx->param_bindless_samplers_and_images);
+ index = lp_build_emit_fetch_src(bld_base, reg,
+ TGSI_TYPE_UNSIGNED, 0);
}
if (target == TGSI_TEXTURE_BUFFER)