diff options
| author | Marek Olšák <[email protected]> | 2017-04-22 19:34:26 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-04-28 21:47:35 +0200 |
| commit | 4e5006202810ae3450a28372a2bf79663e1b6066 (patch) | |
| tree | 31bcff81fb19d1f70cc3d0734f138ee7046313d0 /src/gallium/drivers/radeonsi/si_shader_internal.h | |
| parent | 2823e15f60c571ee415788ebc20f1bf00206f2a5 (diff) | |
radeonsi: pass tessellation ring addresses via user SGPRs
This removes s_load_dword latency for tess rings.
We need just 1 SGPR for the address if we use 64K alignment. The final asm
for recreating the descriptor is:
// s2 is (address >> 16)
s_mov_b32 s3, 0
s_lshl_b64 s[4:5], s[2:3], 16
s_mov_b32 s6, -1
s_mov_b32 s7, 0x27fac
v2: bitcast the descriptor type from v2i64 to v4i32
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_shader_internal.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader_internal.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index 233a96f8e0a..8a9bf109af7 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -162,6 +162,8 @@ struct si_shader_context { * [26:31] = gl_PatchVerticesIn, max = 32 */ int param_tcs_out_lds_layout; + int param_tcs_offchip_addr_base64k; + int param_tcs_factor_addr_base64k; int param_tcs_offchip_offset; int param_tcs_factor_offset; int param_tcs_patch_id; |