aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_pipe.c
diff options
context:
space:
mode:
authorMarek Olšák <[email protected]>2018-04-07 23:40:26 -0400
committerMarek Olšák <[email protected]>2018-04-27 17:56:04 -0400
commit1cc2e0cc6b47bd5efbf2af266405060785085e6b (patch)
treecc87d48ec4ef516f51ceab886c8837effac19123 /src/gallium/drivers/radeonsi/si_pipe.c
parentca33d961a4034ebf4e8e93be32ce3dc9d18570ab (diff)
radeonsi: fully enable 2x DCC MSAA for array and non-array textures
The clear code is exactly the same as for 1 sample buffers - just clear the whole thing. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 327dd7c4242..3eb89ff0287 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -90,7 +90,6 @@ static const struct debug_named_value debug_options[] = {
{ "nodccclear", DBG(NO_DCC_CLEAR), "Disable DCC fast clear." },
{ "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main framebuffer" },
{ "nodccmsaa", DBG(NO_DCC_MSAA), "Disable DCC for MSAA" },
- { "dccmsaa", DBG(DCC_MSAA), "Enable DCC for MSAA" },
{ "nofmask", DBG(NO_FMASK), "Disable MSAA compression" },
/* Tests: */
@@ -984,9 +983,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
}
sscreen->dcc_msaa_allowed =
- !(sscreen->debug_flags & DBG(NO_DCC_MSAA)) &&
- (sscreen->debug_flags & DBG(DCC_MSAA) ||
- sscreen->info.chip_class == VI);
+ !(sscreen->debug_flags & DBG(NO_DCC_MSAA));
sscreen->cpdma_prefetch_writes_memory = sscreen->info.chip_class <= VI;