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authorMarek Olšák <[email protected]>2017-08-15 17:51:05 +0200
committerMarek Olšák <[email protected]>2017-08-18 15:59:22 +0200
commit13aa8d3da92bd83abc8d5212764a15b1217e93bd (patch)
treee0ff9fc39934360d6b7b67939212c4e5a296d3c0 /src/gallium/drivers/radeonsi/si_pipe.c
parent5ee159e4b3122f3906845a7126e5cdf463a7d465 (diff)
radeonsi: don't use CLEAR_STATE on SI
This fixes random hangs with Unigine Valley. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102201 Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some registers") Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index cac1d015593..80a77a8f1f2 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1067,6 +1067,10 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
sscreen->tess_offchip_block_dw_size =
sscreen->b.family == CHIP_HAWAII ? 4096 : 8192;
+ /* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
+ * on SI. */
+ sscreen->has_clear_state = sscreen->b.chip_class >= CIK;
+
sscreen->has_distributed_tess =
sscreen->b.chip_class >= VI &&
sscreen->b.info.max_se >= 2;