diff options
| author | Marek Olšák <[email protected]> | 2018-09-28 18:49:29 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-10-16 15:28:22 -0400 |
| commit | 9e182b8313c5ab952498a76495f57e8420f9e5ad (patch) | |
| tree | d365aefb270bd6cbf4dfb03b4435dba9de2a1671 /src/gallium/drivers/radeonsi/si_gfx_cs.c | |
| parent | fedc1fda3096d6e41ccd40efdcff6dc966badbc3 (diff) | |
radeonsi: center viewport to improve guardband clipping for high resolutions
This will be more useful when we change the quant mode to increase subpixel
precision and decrease the viewport range (which might not be possible
if the viewport is not centered in the viewport range).
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_gfx_cs.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_gfx_cs.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index 3ddd7864d1c..84f5e4c8722 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -348,6 +348,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx) ctx->tracked_regs.reg_value[SI_TRACKED_PA_CL_GB_VERT_DISC_ADJ] = 0x3f800000; ctx->tracked_regs.reg_value[SI_TRACKED_PA_CL_GB_HORZ_CLIP_ADJ] = 0x3f800000; ctx->tracked_regs.reg_value[SI_TRACKED_PA_CL_GB_HORZ_DISC_ADJ] = 0x3f800000; + ctx->tracked_regs.reg_value[SI_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET] = 0; ctx->tracked_regs.reg_value[SI_TRACKED_PA_SC_CLIPRECT_RULE] = 0xffff; ctx->tracked_regs.reg_value[SI_TRACKED_VGT_ESGS_RING_ITEMSIZE] = 0x00000000; ctx->tracked_regs.reg_value[SI_TRACKED_VGT_GSVS_RING_OFFSET_1] = 0x00000000; |