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authorMarek Olšák <[email protected]>2019-02-25 22:53:37 -0500
committerMarek Olšák <[email protected]>2019-05-16 13:13:36 -0400
commit04122532e3c06260ae889a4f6a28d6f9849b00f5 (patch)
tree4efe14a9881ff4d9377eac6a99e5a42a4a6c3655 /src/gallium/drivers/radeonsi/si_compute_prim_discard.c
parent9f505ce21d675b102cb2c89ac1ab2f03d6680b22 (diff)
radeonsi: invalidate caches at the beginning of the prim discard compute IB
Acked-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_compute_prim_discard.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute_prim_discard.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
index 8261311f74a..362c63c2e44 100644
--- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
+++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
@@ -1196,6 +1196,17 @@ void si_dispatch_prim_discard_cs_and_draw(struct si_context *sctx,
}
/* 2) IB initialization. */
+
+ /* This needs to be done at the beginning of IBs due to possible
+ * TTM buffer moves in the kernel.
+ */
+ si_emit_surface_sync(sctx, cs,
+ S_0085F0_TC_ACTION_ENA(1) |
+ S_0085F0_TCL1_ACTION_ENA(1) |
+ S_0301F0_TC_WB_ACTION_ENA(sctx->chip_class >= GFX8) |
+ S_0085F0_SH_ICACHE_ACTION_ENA(1) |
+ S_0085F0_SH_KCACHE_ACTION_ENA(1));
+
/* Restore the GDS prim restart counter if needed. */
if (sctx->preserve_prim_restart_gds_at_flush) {
si_cp_copy_data(sctx, cs,