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authorMarek Olšák <[email protected]>2018-06-14 02:43:19 -0400
committerMarek Olšák <[email protected]>2018-06-28 22:27:25 -0400
commit1542169a4aeac3b6c36af79fdaa17349933d5fd3 (patch)
tree34507b3dc7ffb75beeaeb6b3a69b4f70745eb045 /src/gallium/drivers/radeonsi/si_compute.c
parentd77557c9db21099b73e11ee9f88ffa5105cd184c (diff)
radeonsi: enable shader caching for compute shaders
Compute shaders were not using the shader cache.
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_compute.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute.c45
1 files changed, 38 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 6096766f694..c8f864760f6 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -88,15 +88,16 @@ static void si_create_compute_state_async(void *job, int thread_index)
struct si_shader_selector sel;
struct si_compiler *compiler;
struct pipe_debug_callback *debug = &program->compiler_ctx_state.debug;
+ struct si_screen *sscreen = program->screen;
assert(!debug->debug_message || debug->async);
assert(thread_index >= 0);
- assert(thread_index < ARRAY_SIZE(program->screen->compiler));
- compiler = &program->screen->compiler[thread_index];
+ assert(thread_index < ARRAY_SIZE(sscreen->compiler));
+ compiler = &sscreen->compiler[thread_index];
memset(&sel, 0, sizeof(sel));
- sel.screen = program->screen;
+ sel.screen = sscreen;
if (program->ir_type == PIPE_SHADER_IR_TGSI) {
tgsi_scan_shader(program->ir.tgsi, &sel.info);
@@ -125,10 +126,36 @@ static void si_create_compute_state_async(void *job, int thread_index)
program->uses_block_size = sel.info.uses_block_size;
program->uses_bindless_samplers = sel.info.uses_bindless_samplers;
program->uses_bindless_images = sel.info.uses_bindless_images;
+ program->variable_group_size =
+ sel.info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0;
- if (si_shader_create(program->screen, compiler, &program->shader, debug)) {
- program->shader.compilation_failed = true;
+ void *ir_binary = si_get_ir_binary(&sel);
+
+ /* Try to load the shader from the shader cache. */
+ mtx_lock(&sscreen->shader_cache_mutex);
+
+ if (ir_binary &&
+ si_shader_cache_load_shader(sscreen, ir_binary, shader)) {
+ mtx_unlock(&sscreen->shader_cache_mutex);
+
+ si_shader_dump_stats_for_shader_db(shader, debug);
+ si_shader_dump(sscreen, shader, debug, PIPE_SHADER_COMPUTE,
+ stderr, true);
+
+ if (si_shader_binary_upload(sscreen, shader))
+ program->shader.compilation_failed = true;
} else {
+ mtx_unlock(&sscreen->shader_cache_mutex);
+
+ if (si_shader_create(sscreen, compiler, &program->shader, debug)) {
+ program->shader.compilation_failed = true;
+
+ if (program->ir_type == PIPE_SHADER_IR_TGSI)
+ FREE(program->ir.tgsi);
+ program->shader.selector = NULL;
+ return;
+ }
+
bool scratch_enabled = shader->config.scratch_bytes_per_wave > 0;
unsigned user_sgprs = SI_NUM_RESOURCE_SGPRS +
(sel.info.uses_grid_size ? 3 : 0) +
@@ -150,8 +177,12 @@ static void si_create_compute_state_async(void *job, int thread_index)
sel.info.uses_thread_id[1] ? 1 : 0) |
S_00B84C_LDS_SIZE(shader->config.lds_size);
- program->variable_group_size =
- sel.info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0;
+ if (ir_binary) {
+ mtx_lock(&sscreen->shader_cache_mutex);
+ if (!si_shader_cache_insert_shader(sscreen, ir_binary, shader, true))
+ FREE(ir_binary);
+ mtx_unlock(&sscreen->shader_cache_mutex);
+ }
}
if (program->ir_type == PIPE_SHADER_IR_TGSI)