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authorMarek Olšák <[email protected]>2017-11-25 20:16:02 +0100
committerMarek Olšák <[email protected]>2017-11-29 18:21:30 +0100
commit175ee084ff5e05398467ad66ea99ed812711f1a1 (patch)
tree2948e37708c8049670497eaf7c5e6cf3249a6328 /src/gallium/drivers/radeonsi/si_clear.c
parent8a58724ac998cd57f43e3c6a2dee1a7efdc47417 (diff)
radeonsi: don't use fast color clear for small surfaces
This removes 35+ clear eliminate passes from DOTA 2. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 00589caf5be..4663fc29cc6 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -421,6 +421,17 @@ static void si_do_fast_color_clear(struct si_context *sctx,
bool need_decompress_pass = false;
+ /* Use a slow clear for small surfaces where the cost of
+ * the eliminate pass can be higher than the benefit of fast
+ * clear. The closed driver does this, but the numbers may differ.
+ *
+ * Always use fast clear on APUs.
+ */
+ bool too_small = sctx->screen->b.info.has_dedicated_vram &&
+ tex->resource.b.b.nr_samples <= 1 &&
+ tex->resource.b.b.width0 <= 256 &&
+ tex->resource.b.b.height0 <= 256;
+
/* Try to clear DCC first, otherwise try CMASK. */
if (vi_dcc_enabled(tex, 0)) {
uint32_t reset_value;
@@ -439,6 +450,9 @@ static void si_do_fast_color_clear(struct si_context *sctx,
&clear_words_needed))
continue;
+ if (clear_words_needed && too_small)
+ continue;
+
/* DCC fast clear with MSAA should clear CMASK to 0xC. */
if (tex->resource.b.b.nr_samples >= 2 && tex->cmask.size) {
/* TODO: This doesn't work with MSAA. */
@@ -458,6 +472,9 @@ static void si_do_fast_color_clear(struct si_context *sctx,
tex->separate_dcc_dirty = true;
} else {
+ if (too_small)
+ continue;
+
/* 128-bit formats are unusupported */
if (tex->surface.bpe > 8) {
continue;