diff options
author | Marek Olšák <[email protected]> | 2019-08-21 00:13:17 -0400 |
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committer | Marek Olšák <[email protected]> | 2019-08-27 16:16:08 -0400 |
commit | 2e94cb66933fd7b130011b53b47e0816eb8a76d5 (patch) | |
tree | d721933c071f8bc780a906a1efb9bbd929c6c933 /src/gallium/drivers/radeonsi/si_build_pm4.h | |
parent | d9a453c7479f258e42578c5937c513668134b66e (diff) |
radeonsi: add PKT3_CONTEXT_REG_RMW
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_build_pm4.h')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_build_pm4.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h index 4e8890a5f97..0b0b64ca13c 100644 --- a/src/gallium/drivers/radeonsi/si_build_pm4.h +++ b/src/gallium/drivers/radeonsi/si_build_pm4.h @@ -116,6 +116,36 @@ static inline void radeon_set_uconfig_reg_idx(struct radeon_cmdbuf *cs, radeon_emit(cs, value); } +static inline void radeon_set_context_reg_rmw(struct radeon_cmdbuf *cs, unsigned reg, + unsigned value, unsigned mask) +{ + assert(reg >= SI_CONTEXT_REG_OFFSET); + assert(cs->current.cdw + 4 <= cs->current.max_dw); + radeon_emit(cs, PKT3(PKT3_CONTEXT_REG_RMW, 2, 0)); + radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2); + radeon_emit(cs, mask); + radeon_emit(cs, value); +} + +/* Emit PKT3_CONTEXT_REG_RMW if the register value is different. */ +static inline void radeon_opt_set_context_reg_rmw(struct si_context *sctx, unsigned offset, + enum si_tracked_reg reg, unsigned value, + unsigned mask) +{ + struct radeon_cmdbuf *cs = sctx->gfx_cs; + + assert((value & ~mask) == 0); + value &= mask; + + if (((sctx->tracked_regs.reg_saved >> reg) & 0x1) != 0x1 || + sctx->tracked_regs.reg_value[reg] != value) { + radeon_set_context_reg_rmw(cs, offset, value, mask); + + sctx->tracked_regs.reg_saved |= 0x1ull << reg; + sctx->tracked_regs.reg_value[reg] = value; + } +} + /* Emit PKT3_SET_CONTEXT_REG if the register value is different. */ static inline void radeon_opt_set_context_reg(struct si_context *sctx, unsigned offset, enum si_tracked_reg reg, unsigned value) |