gallium/radeon: subclass threaded_resource

Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Dieter Nützel <[email protected]>

3 files changed, 22 insertions, 18 deletions

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 5d984ea8066..b57632e0772 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -27,7 +27,6 @@
 #include "r600_cs.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
-#include "util/u_threaded_context.h"
 #include <inttypes.h>
 #include <stdio.h>
 
@@ -239,6 +238,7 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
 {
 	struct r600_resource *rbuffer = r600_resource(buf);
 
+	threaded_resource_deinit(buf);
 	util_range_destroy(&rbuffer->valid_buffer_range);
 	pb_reference(&rbuffer->buf, NULL);
 	FREE(rbuffer);
@@ -249,7 +249,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
 		       struct r600_resource *rbuffer)
 {
 	/* Shared buffers can't be reallocated. */
-	if (rbuffer->is_shared)
+	if (rbuffer->b.is_shared)
 		return false;
 
 	/* Sparse buffers can't be reallocated. */
@@ -259,7 +259,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
 	/* In AMD_pinned_memory, the user pointer association only gets
 	 * broken when the buffer is explicitly re-allocated.
 	 */
-	if (rctx->ws->buffer_is_user_ptr(rbuffer->buf))
+	if (rbuffer->b.is_user_ptr)
 		return false;
 
 	/* Check if mapping this buffer would cause waiting for the GPU. */
@@ -349,7 +349,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
 	 *
 	 * So don't ever use staging buffers.
 	 */
-	if (rscreen->ws->buffer_is_user_ptr(rbuffer->buf))
+	if (rbuffer->b.is_user_ptr)
 		usage |= PIPE_TRANSFER_PERSISTENT;
 
 	/* See if the buffer range being mapped has never been initialized,
@@ -357,7 +357,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
 	if (!(usage & (PIPE_TRANSFER_UNSYNCHRONIZED |
 		       TC_TRANSFER_MAP_IGNORE_VALID_RANGE)) &&
 	    usage & PIPE_TRANSFER_WRITE &&
-	    !rbuffer->is_shared &&
+	    !rbuffer->b.is_shared &&
 	    !util_ranges_intersect(&rbuffer->valid_buffer_range, box->x, box->x + box->width)) {
 		usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
 	}
@@ -565,11 +565,13 @@ r600_alloc_buffer_struct(struct pipe_screen *screen,
 	rbuffer->b.b.next = NULL;
 	pipe_reference_init(&rbuffer->b.b.reference, 1);
 	rbuffer->b.b.screen = screen;
+
 	rbuffer->b.vtbl = &r600_buffer_vtbl;
+	threaded_resource_init(&rbuffer->b.b);
+
 	rbuffer->buf = NULL;
 	rbuffer->bind_history = 0;
 	rbuffer->TC_L2_dirty = false;
-	rbuffer->is_shared = false;
 	util_range_init(&rbuffer->valid_buffer_range);
 	return rbuffer;
 }
@@ -627,7 +629,9 @@ r600_buffer_from_user_memory(struct pipe_screen *screen,
 
 	rbuffer->domains = RADEON_DOMAIN_GTT;
 	rbuffer->flags = 0;
+	rbuffer->b.is_user_ptr = true;
 	util_range_add(&rbuffer->valid_buffer_range, 0, templ->width0);
+	util_range_add(&rbuffer->b.valid_buffer_range, 0, templ->width0);
 
 	/* Convert a user pointer to a buffer. */
 	rbuffer->buf = ws->buffer_from_ptr(ws, user_memory, templ->width0);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 51d797a03a7..34497863f89 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -45,6 +45,7 @@
 #include "util/slab.h"
 #include "util/u_suballoc.h"
 #include "util/u_transfer.h"
+#include "util/u_threaded_context.h"
 
 #define ATI_VENDOR_ID 0x1002
 
@@ -140,7 +141,7 @@ void radeon_shader_binary_clean(struct ac_shader_binary *b);
  * at the moment.
  */
 struct r600_resource {
-	struct u_resource		b;
+	struct threaded_resource	b;
 
 	/* Winsys objects. */
 	struct pb_buffer		*buf;
@@ -179,7 +180,6 @@ struct r600_resource {
 	bool				TC_L2_dirty;
 
 	/* Whether the resource has been exported via resource_get_handle. */
-	bool				is_shared;
 	unsigned			external_usage; /* PIPE_HANDLE_USAGE_* */
 };
 
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 449d7bc6cf0..3bcf9667fd0 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -389,7 +389,7 @@ static bool r600_can_disable_dcc(struct r600_texture *rtex)
 {
 	/* We can't disable DCC if it can be written by another process. */
 	return rtex->dcc_offset &&
-	       (!rtex->resource.is_shared ||
+	       (!rtex->resource.b.is_shared ||
 		!(rtex->resource.external_usage & PIPE_HANDLE_USAGE_WRITE));
 }
 
@@ -466,7 +466,7 @@ static void r600_degrade_tile_mode_to_linear(struct r600_common_context *rctx,
 	if (rctx->chip_class < SI)
 		return;
 
-	if (rtex->resource.is_shared ||
+	if (rtex->resource.b.is_shared ||
 	    rtex->surface.is_linear)
 		return;
 
@@ -570,7 +570,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
 		}
 
 		/* Set metadata. */
-		if (!res->is_shared || update_metadata) {
+		if (!res->b.is_shared || update_metadata) {
 			r600_texture_init_metadata(rscreen, rtex, &metadata);
 			if (rscreen->query_opaque_metadata)
 				rscreen->query_opaque_metadata(rscreen, rtex,
@@ -580,7 +580,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
 		}
 	}
 
-	if (res->is_shared) {
+	if (res->b.is_shared) {
 		/* USAGE_EXPLICIT_FLUSH must be cleared if at least one user
 		 * doesn't set it.
 		 */
@@ -588,7 +588,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
 		if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
 			res->external_usage &= ~PIPE_HANDLE_USAGE_EXPLICIT_FLUSH;
 	} else {
-		res->is_shared = true;
+		res->b.is_shared = true;
 		res->external_usage = usage;
 	}
 
@@ -1432,7 +1432,7 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen
 	if (!rtex)
 		return NULL;
 
-	rtex->resource.is_shared = true;
+	rtex->resource.b.is_shared = true;
 	rtex->resource.external_usage = usage;
 
 	if (rscreen->apply_opaque_metadata)
@@ -1550,7 +1550,7 @@ static bool r600_can_invalidate_texture(struct r600_common_screen *rscreen,
 {
 	/* r600g doesn't react to dirty_tex_descriptor_counter */
 	return rscreen->chip_class >= SI &&
-		!rtex->resource.is_shared &&
+		!rtex->resource.b.is_shared &&
 		!(transfer_usage & PIPE_TRANSFER_READ) &&
 		rtex->resource.b.b.last_level == 0 &&
 		util_texrange_covers_whole_level(&rtex->resource.b.b, 0,
@@ -2257,7 +2257,7 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
 	/* The intent is to use this with shared displayable back buffers,
 	 * but it's not strictly limited only to them.
 	 */
-	if (!tex->resource.is_shared ||
+	if (!tex->resource.b.is_shared ||
 	    !(tex->resource.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) ||
 	    tex->resource.b.b.target != PIPE_TEXTURE_2D ||
 	    tex->resource.b.b.last_level > 0 ||
@@ -2524,7 +2524,7 @@ void vi_dcc_clear_level(struct r600_common_context *rctx,
 static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen,
 					   struct r600_texture *rtex)
 {
-	if (rtex->resource.is_shared ||
+	if (rtex->resource.b.is_shared ||
 	    rtex->resource.b.b.nr_samples <= 1 ||
 	    rtex->surface.micro_tile_mode == rtex->last_msaa_resolve_target_micro_mode)
 		return;
@@ -2674,7 +2674,7 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
 		 * because there is no way to communicate the clear color among
 		 * all clients
 		 */
-		if (tex->resource.is_shared &&
+		if (tex->resource.b.is_shared &&
 		    !(tex->resource.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
 			continue;