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authorBoyuan Zhang <[email protected]>2019-05-29 14:25:07 -0400
committerLeo Liu <[email protected]>2019-07-26 14:33:09 -0400
commit77cf700fa3920899d17ff769669263eb875ceb60 (patch)
treea5bc3d319186dd1bdc6354f13619905083e493c1 /src/gallium/drivers/radeon
parentd5992ab134f6d3d8d8a885be50fe2f696fe0354e (diff)
radeon/uvd: fix poc for hevc encode
MaxPicOrderCntLsb should be at least 16 according to the spec, therefore add minimum value check. Also use poc value passed from st instead of calculation in slice header encoding. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673 Cc: [email protected] V2: Fix typo V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb should be power of 2 according to spec. Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Leo Liu <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd_enc.c3
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c3
2 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.c b/src/gallium/drivers/radeon/radeon_uvd_enc.c
index 3164dbb2c20..639e5043543 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.c
@@ -73,7 +73,8 @@ radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
- enc->enc_pic.max_poc = pic->seq.intra_period;
+ enc->enc_pic.max_poc =
+ MAX2(16, util_next_power_of_two(pic->seq.intra_period));
enc->enc_pic.log2_max_poc = 0;
for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
i = (i >> 1);
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
index 1f41b09472f..b1b49c28801 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -768,8 +768,7 @@ radeon_uvd_enc_slice_header_hevc(struct radeon_uvd_encoder *enc)
if ((enc->enc_pic.nal_unit_type != 19)
&& (enc->enc_pic.nal_unit_type != 20)) {
radeon_uvd_enc_code_fixed_bits(enc,
- enc->enc_pic.frame_num %
- enc->enc_pic.max_poc,
+ enc->enc_pic.pic_order_cnt,
enc->enc_pic.log2_max_poc);
if (enc->enc_pic.picture_type == PIPE_H265_ENC_PICTURE_TYPE_P)
radeon_uvd_enc_code_fixed_bits(enc, 0x1, 1);