diff options
| author | Leo Liu <[email protected]> | 2015-06-25 10:14:14 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-08-14 15:02:31 +0200 |
| commit | 09def7e1e06827ab1eae091f0e765d91c6715cf9 (patch) | |
| tree | 61761c5eb3be69ec387471a3a90f335e39423c0b /src/gallium/drivers/radeon/radeon_vce_50.c | |
| parent | 4dfcf6e3a91be97fcf9d3f44e76a7a389f8f40b2 (diff) | |
radeon/vce: implement VCE dual instance support
VCE dual instances are encoding in parallel, it needs two frames for
encoding with their own parameters in one IB. Master instance will check
the task info to find another frame, assign it to the slave instance
Signed-off-by: Leo Liu <[email protected]>
Signed-off-by: Christian König <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_vce_50.c')
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_vce_50.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c index 5bf22194418..afdab18c0d3 100644 --- a/src/gallium/drivers/radeon/radeon_vce_50.c +++ b/src/gallium/drivers/radeon/radeon_vce_50.c @@ -78,17 +78,30 @@ static void rate_control(struct rvce_encoder *enc) static void encode(struct rvce_encoder *enc) { - signed luma_offset, chroma_offset; + signed luma_offset, chroma_offset, bs_offset; + unsigned dep, bs_idx = enc->bs_idx++; int i; - enc->task_info(enc, 0x00000003, 0, 0, 0); + if (enc->dual_inst) { + if (bs_idx == 0) + dep = 1; + else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) + dep = 0; + else + dep = 2; + } else + dep = 0; + + enc->task_info(enc, 0x00000003, dep, 0, bs_idx); RVCE_BEGIN(0x05000001); // context buffer RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo RVCE_END(); + bs_offset = -(signed)(bs_idx * enc->bs_size); + RVCE_BEGIN(0x05000004); // video bitstream buffer - RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, 0); // videoBitstreamRingAddressHi/Lo + RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, bs_offset); // videoBitstreamRingAddressHi/Lo RVCE_CS(enc->bs_size); // videoBitstreamRingSize RVCE_END(); |