diff options
author | Christian König <[email protected]> | 2015-03-26 09:52:37 +0100 |
---|---|---|
committer | Christian König <[email protected]> | 2015-05-22 10:17:24 +0200 |
commit | 2b40c306d238e2e738d8901e10f351a109b02687 (patch) | |
tree | edccc95124361fcd6d5a03a4d4c68465da28e18d /src/gallium/drivers/radeon/radeon_vce_40_2_2.c | |
parent | 7c1a00174b2bec102030b19b6094ebcab23fe04d (diff) |
radeon/vce: move CPB handling function into common code
They are not firmware version dependent.
Signed-off-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_vce_40_2_2.c')
-rw-r--r-- | src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 32 |
1 files changed, 3 insertions, 29 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c index 09029575547..51b17b5f6a8 100644 --- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c +++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c @@ -46,32 +46,6 @@ static const unsigned profiles[7] = { 66, 77, 88, 100, 110, 122, 244 }; -static struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc) -{ - return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list); -} - -static struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc) -{ - return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list); -} - -static struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc) -{ - return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list); -} - -static void frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot, - unsigned *luma_offset, unsigned *chroma_offset) -{ - unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128); - unsigned vpitch = align(enc->luma->npix_y, 16); - unsigned fsize = pitch * (vpitch + vpitch / 2); - - *luma_offset = slot->index * fsize; - *chroma_offset = *luma_offset + pitch * vpitch; -} - static void session(struct rvce_encoder *enc) { RVCE_BEGIN(0x00000001); // session cmd @@ -369,7 +343,7 @@ static void encode(struct rvce_encoder *enc) if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P || enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { struct rvce_cpb_slot *l0 = l0_slot(enc); - frame_offset(enc, l0, &luma_offset, &chroma_offset); + rvce_frame_offset(enc, l0, &luma_offset, &chroma_offset); RVCE_CS(l0->picture_type); // encPicType RVCE_CS(l0->frame_num); // frameNumber RVCE_CS(l0->pic_order_cnt); // pictureOrderCount @@ -395,7 +369,7 @@ static void encode(struct rvce_encoder *enc) RVCE_CS(0x00000000); // pictureStructure if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { struct rvce_cpb_slot *l1 = l1_slot(enc); - frame_offset(enc, l1, &luma_offset, &chroma_offset); + rvce_frame_offset(enc, l1, &luma_offset, &chroma_offset); RVCE_CS(l1->picture_type); // encPicType RVCE_CS(l1->frame_num); // frameNumber RVCE_CS(l1->pic_order_cnt); // pictureOrderCount @@ -409,7 +383,7 @@ static void encode(struct rvce_encoder *enc) RVCE_CS(0xffffffff); // chromaOffset } - frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset); + rvce_frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset); RVCE_CS(luma_offset); // encReconstructedLumaOffset RVCE_CS(chroma_offset); // encReconstructedChromaOffset RVCE_CS(0x00000000); // encColocBufferOffset |