diff options
| author | Tom Stellard <[email protected]> | 2012-09-05 11:28:31 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2012-09-05 13:17:17 -0400 |
| commit | 12d3d6f6ab34d0ede8a2798fe68e7c9b1c894dac (patch) | |
| tree | 8d76d4a111f86c2f52af224890f140673335af8a /src/gallium/drivers/radeon/SIInstructions.td | |
| parent | d68e337c600a1b644d84e4703c92c2087aff82a4 (diff) | |
radeon/llvm: Use correct float->int conversion opcode on SI.
V_CVT_I32_F32 converts floats to signed integers, but we were using
V_CVT_F32_I32 which convertes signed integers to float.
Diffstat (limited to 'src/gallium/drivers/radeon/SIInstructions.td')
| -rw-r--r-- | src/gallium/drivers/radeon/SIInstructions.td | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td index e9e91fda58a..39ecdcd0102 100644 --- a/src/gallium/drivers/radeon/SIInstructions.td +++ b/src/gallium/drivers/radeon/SIInstructions.td @@ -503,11 +503,13 @@ defm V_READFIRSTLANE_B32 : VOP1_32 <0x00000002, "V_READFIRSTLANE_B32", []>; //defm V_CVT_I32_F64 : VOP1_32 <0x00000003, "V_CVT_I32_F64", []>; //defm V_CVT_F64_I32 : VOP1_64 <0x00000004, "V_CVT_F64_I32", []>; defm V_CVT_F32_I32 : VOP1_32 <0x00000005, "V_CVT_F32_I32", - [(set VReg_32:$dst, (fp_to_sint AllReg_32:$src0))] + [(set VReg_32:$dst, (sint_to_fp AllReg_32:$src0))] >; //defm V_CVT_F32_U32 : VOP1_32 <0x00000006, "V_CVT_F32_U32", []>; //defm V_CVT_U32_F32 : VOP1_32 <0x00000007, "V_CVT_U32_F32", []>; -//defm V_CVT_I32_F32 : VOP1_32 <0x00000008, "V_CVT_I32_F32", []>; +defm V_CVT_I32_F32 : VOP1_32 <0x00000008, "V_CVT_I32_F32", + [(set VReg_32:$dst, (fp_to_sint AllReg_32:$src0))] +>; defm V_MOV_FED_B32 : VOP1_32 <0x00000009, "V_MOV_FED_B32", []>; ////def V_CVT_F16_F32 : VOP1_F16 <0x0000000a, "V_CVT_F16_F32", []>; //defm V_CVT_F32_F16 : VOP1_32 <0x0000000b, "V_CVT_F32_F16", []>; |