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authorTom Stellard <[email protected]>2012-09-11 15:24:32 -0400
committerTom Stellard <[email protected]>2012-09-13 10:38:02 -0400
commit6a5a4d59ce63aa1fa14d3dd6c50169c532424b6d (patch)
treeba0e1c5952a7969ae30fdf3be6c7d90bf2c73778 /src/gallium/drivers/radeon/AMDILInstrInfo.td
parent70a50685a8f7934e23978ac34dcefcfab46c69de (diff)
radeon/llvm: Fix lowering of vbuild
Some of the old AMDIL code was hard-coding subreg indices when creating the VBUILD node, which was making it difficult to match the vector_insert patterns.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDILInstrInfo.td')
-rw-r--r--src/gallium/drivers/radeon/AMDILInstrInfo.td6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeon/AMDILInstrInfo.td b/src/gallium/drivers/radeon/AMDILInstrInfo.td
index 779566d4bf3..f8771afa180 100644
--- a/src/gallium/drivers/radeon/AMDILInstrInfo.td
+++ b/src/gallium/drivers/radeon/AMDILInstrInfo.td
@@ -124,12 +124,6 @@ def IL_mad : SDNode<"AMDGPUISD::MAD", SDTIL_GenTernaryOp>;
def IL_umul : SDNode<"AMDGPUISD::UMUL" , SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]>;
-//===----------------------------------------------------------------------===//
-// Vector functions
-//===----------------------------------------------------------------------===//
-def IL_vbuild : SDNode<"AMDGPUISD::VBUILD", SDTIL_GenVecBuild,
- []>;
-
//===--------------------------------------------------------------------===//
// Custom Pattern DAG Nodes
//===--------------------------------------------------------------------===//