From 6a5a4d59ce63aa1fa14d3dd6c50169c532424b6d Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Tue, 11 Sep 2012 15:24:32 -0400 Subject: radeon/llvm: Fix lowering of vbuild Some of the old AMDIL code was hard-coding subreg indices when creating the VBUILD node, which was making it difficult to match the vector_insert patterns. --- src/gallium/drivers/radeon/AMDILInstrInfo.td | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src/gallium/drivers/radeon/AMDILInstrInfo.td') diff --git a/src/gallium/drivers/radeon/AMDILInstrInfo.td b/src/gallium/drivers/radeon/AMDILInstrInfo.td index 779566d4bf3..f8771afa180 100644 --- a/src/gallium/drivers/radeon/AMDILInstrInfo.td +++ b/src/gallium/drivers/radeon/AMDILInstrInfo.td @@ -124,12 +124,6 @@ def IL_mad : SDNode<"AMDGPUISD::MAD", SDTIL_GenTernaryOp>; def IL_umul : SDNode<"AMDGPUISD::UMUL" , SDTIntBinOp, [SDNPCommutative, SDNPAssociative]>; -//===----------------------------------------------------------------------===// -// Vector functions -//===----------------------------------------------------------------------===// -def IL_vbuild : SDNode<"AMDGPUISD::VBUILD", SDTIL_GenVecBuild, - []>; - //===--------------------------------------------------------------------===// // Custom Pattern DAG Nodes //===--------------------------------------------------------------------===// -- cgit v1.2.3