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authorTom Stellard <[email protected]>2012-06-02 06:16:18 -0400
committerTom Stellard <[email protected]>2012-06-06 13:46:03 -0400
commit8d53ddb375d2a82860b398bc463294373c5a62b0 (patch)
tree6e1f74d18b55702ae2176631787bee290d551df1 /src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
parent17e047242e82111859eb8220369c601c79a26350 (diff)
radeon/llvm: Remove AMDIL LOADCONST* instructions
This obsoletes the R600LowerInstruction and SIPropagateImmReads passes.
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')
-rw-r--r--src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index 0601fbc0aa6..b4d2a2f5ea1 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -135,9 +135,7 @@ bool AMDGPUPassConfig::addInstSelector() {
bool AMDGPUPassConfig::addPreRegAlloc() {
const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
- if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
- PM->add(createR600LowerInstructionsPass(*TM));
- } else {
+ if (ST.device()->getGeneration() > AMDILDeviceInfo::HD6XXX) {
PM->add(createSIAssignInterpRegsPass(*TM));
}
PM->add(createAMDGPULowerInstructionsPass(*TM));
@@ -154,12 +152,8 @@ bool AMDGPUPassConfig::addPreSched2() {
}
bool AMDGPUPassConfig::addPreEmitPass() {
- const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
PM->add(createAMDILCFGPreparationPass(*TM));
PM->add(createAMDILCFGStructurizerPass(*TM));
- if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
- PM->add(createSIPropagateImmReadsPass(*TM));
- }
return false;
}