From 8d53ddb375d2a82860b398bc463294373c5a62b0 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Sat, 2 Jun 2012 06:16:18 -0400
Subject: radeon/llvm: Remove AMDIL LOADCONST* instructions

This obsoletes the R600LowerInstruction and SIPropagateImmReads passes.
---
 src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

(limited to 'src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp')

diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index 0601fbc0aa6..b4d2a2f5ea1 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -135,9 +135,7 @@ bool AMDGPUPassConfig::addInstSelector() {
 bool AMDGPUPassConfig::addPreRegAlloc() {
   const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
 
-  if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
-    PM->add(createR600LowerInstructionsPass(*TM));
-  } else {
+  if (ST.device()->getGeneration() > AMDILDeviceInfo::HD6XXX) {
     PM->add(createSIAssignInterpRegsPass(*TM));
   }
   PM->add(createAMDGPULowerInstructionsPass(*TM));
@@ -154,12 +152,8 @@ bool AMDGPUPassConfig::addPreSched2() {
 }
 
 bool AMDGPUPassConfig::addPreEmitPass() {
-  const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
   PM->add(createAMDILCFGPreparationPass(*TM));
   PM->add(createAMDILCFGStructurizerPass(*TM));
-  if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
-    PM->add(createSIPropagateImmReadsPass(*TM));
-  }
 
   return false;
 }
-- 
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