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authorGlenn Kennard <[email protected]>2015-04-07 03:00:20 +0200
committerDave Airlie <[email protected]>2015-04-08 08:18:35 +1000
commitf2947807c8c7eae4b98eb37263b8a1d9ebbcafb5 (patch)
treebd7e67b69ab05894656392738586c8383b72ce8a /src/gallium/drivers/r600/r600_shader.c
parent06bb68da4a58403e678b51511e40a7f752dfc046 (diff)
r600g/sb: Enable SB for geometry shaders
Add SV_GEOMETRY_EMIT special variable type to track the implicit dependencies between CUT/EMIT_VERTEX/MEM_RING instructions so GCM/scheduler doesn't reorder them. Mark emit instructions as unkillable so DCE doesn't eat them. Enable only for evergreen/cayman as there are a few unexplained GS piglit regressions on R6xx/R7xx with SB enabled otherwise. Signed-off-by: Glenn Kennard <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index ec754002ecc..87b6e6e06ec 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -159,8 +159,10 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
goto error;
}
- /* disable SB for geom shaders - it can't handle the CF_EMIT instructions */
- use_sb &= (shader->shader.processor_type != TGSI_PROCESSOR_GEOMETRY);
+ /* disable SB for geom shaders on R6xx/R7xx due to some mysterious gs piglit regressions with it enabled. */
+ if (rctx->b.chip_class <= R700) {
+ use_sb &= (shader->shader.processor_type != TGSI_PROCESSOR_GEOMETRY);
+ }
/* disable SB for shaders using CF_INDEX_0/1 (sampler/ubo array indexing) as it doesn't handle those currently */
use_sb &= !shader->shader.uses_index_registers;
@@ -1141,6 +1143,8 @@ static int fetch_gs_input(struct r600_shader_ctx *ctx, struct tgsi_full_src_regi
for (i = 0; i < 3; i++) {
treg[i] = r600_get_temp(ctx);
}
+ r600_add_gpr_array(ctx->shader, treg[0], 3, 0x0F);
+
t2 = r600_get_temp(ctx);
for (i = 0; i < 3; i++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -1935,9 +1939,9 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
ctx.bc->index_reg[1] = ctx.bc->ar_reg + 3;
}
+ shader->max_arrays = 0;
+ shader->num_arrays = 0;
if (indirect_gprs) {
- shader->max_arrays = 0;
- shader->num_arrays = 0;
if (ctx.info.indirect_files & (1 << TGSI_FILE_INPUT)) {
r600_add_gpr_array(shader, ctx.file_offset[TGSI_FILE_INPUT],