diff options
| author | Eric Anholt <[email protected]> | 2014-11-12 14:51:22 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2014-11-24 14:56:22 -0800 |
| commit | 00f7002c5c45887b204a3f14b8e3b32472cc39bb (patch) | |
| tree | 1433e73f5f9d425372a1921050fc6f1b0e32998a /src/gallium/drivers/r600/r600_shader.c | |
| parent | ecfe9e2ad2b5f178ef09420f8d95d49937137cd9 (diff) | |
gallium: Drop unused BRA opcode.
Never generated, and implemented in only nvfx vertprog.
Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_shader.c')
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 24fed848e94..2e74d5963d4 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -7250,7 +7250,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {59, 0, ALU_OP0_NOP, tgsi_unsupported}, {60, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_r600_arl}, - {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {62, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, @@ -7449,7 +7449,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { {59, 0, ALU_OP0_NOP, tgsi_unsupported}, {60, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {62, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, @@ -7648,7 +7648,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = { {59, 0, ALU_OP0_NOP, tgsi_unsupported}, {60, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl}, - {TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported}, + {62, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_RET, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SSG, 0, ALU_OP0_NOP, tgsi_ssg}, |