diff options
| author | Jerome Glisse <[email protected]> | 2012-10-26 18:59:05 -0400 |
|---|---|---|
| committer | Jerome Glisse <[email protected]> | 2012-10-31 10:49:15 -0400 |
| commit | 470952f751d1327831c638ee369b7f0f2e20e6fb (patch) | |
| tree | ecc4744c1ceb0186c12ca48297505564fb24b907 /src/gallium/drivers/r600/r600_pipe.h | |
| parent | 183e122bdfe27f875c3c121964484dae9587c051 (diff) | |
r600g: avoid shader needing too many gpr to lockup the gpu v2
On r6xx/r7xx shader resource management need to make sure that the
shader does not goes over the gpr register limit. Each specific
asic has a maxmimum register that can be split btw shader stage.
For each stage the shader must not use more register than the
limit programmed.
v2: Print an error message when discarding draw. Don't add another
boolean to context structure, but rather propagate the discard
boolean through the call chain.
Signed-off-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/r600_pipe.h')
| -rw-r--r-- | src/gallium/drivers/r600/r600_pipe.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 238ab1676f4..342ab87052d 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -620,7 +620,7 @@ void *r600_create_db_flush_dsa(struct r600_context *rctx); void *r600_create_resolve_blend(struct r600_context *rctx); void *r700_create_resolve_blend(struct r600_context *rctx); void *r600_create_decompress_blend(struct r600_context *rctx); -void r600_adjust_gprs(struct r600_context *rctx); +bool r600_adjust_gprs(struct r600_context *rctx); boolean r600_is_format_supported(struct pipe_screen *screen, enum pipe_format format, enum pipe_texture_target target, |