diff options
author | Dave Airlie <[email protected]> | 2016-03-31 16:04:55 +1000 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2017-11-03 09:33:30 +1000 |
commit | 159bf38c3a13737065011bf90c05ad1c35ab321f (patch) | |
tree | 2a00a5ec14e20419f6116f1901c03e6cd3c5dbdd /src/gallium/drivers/r600/eg_asm.c | |
parent | 90ca378080c574a03f9235b803bcf4f85777a1d0 (diff) |
r600: add support for mark bit to the assembler.
This adds support to the assembler for the mark bit
on the export word1.
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/r600/eg_asm.c')
-rw-r--r-- | src/gallium/drivers/r600/eg_asm.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/eg_asm.c b/src/gallium/drivers/r600/eg_asm.c index 19915cff8cb..be927518556 100644 --- a/src/gallium/drivers/r600/eg_asm.c +++ b/src/gallium/drivers/r600/eg_asm.c @@ -89,6 +89,7 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf) S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) | S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) | S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) | + S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) | S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode); if (bc->chip_class == EVERGREEN) /* no EOP on cayman */ @@ -103,6 +104,7 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf) S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr); bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) | S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) | + S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) | S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) | S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) | S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size); |