diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-11-23 21:44:16 -0500 |
---|---|---|
committer | Tomeu Vizoso <[email protected]> | 2019-12-16 09:10:33 +0000 |
commit | a2d5503b68ab54055bad2592aff7cbe193c2345b (patch) | |
tree | 2d91c7b0955fa69416520e12486fcec409e71267 /src/gallium/drivers/panfrost | |
parent | 2c1983aefeb6dacfbc61f9edd71975ea359fae40 (diff) |
panfrost: Pass blend RT number through
We have to key the blend shader for the render target number due to
writeout silliness.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Reviewed-by: Tomeu Visoso <[email protected]>
Diffstat (limited to 'src/gallium/drivers/panfrost')
-rw-r--r-- | src/gallium/drivers/panfrost/pan_assemble.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/panfrost/pan_blend_cso.c | 9 | ||||
-rw-r--r-- | src/gallium/drivers/panfrost/pan_blend_shaders.c | 5 | ||||
-rw-r--r-- | src/gallium/drivers/panfrost/pan_blend_shaders.h | 3 |
4 files changed, 11 insertions, 8 deletions
diff --git a/src/gallium/drivers/panfrost/pan_assemble.c b/src/gallium/drivers/panfrost/pan_assemble.c index e91b20df971..62a4dd654b6 100644 --- a/src/gallium/drivers/panfrost/pan_assemble.c +++ b/src/gallium/drivers/panfrost/pan_assemble.c @@ -65,7 +65,7 @@ panfrost_shader_compile( .alpha_ref = state->alpha_state.ref_value }; - midgard_compile_shader_nir(s, &program, false, screen->gpu_id); + midgard_compile_shader_nir(s, &program, false, 0, screen->gpu_id); /* Prepare the compiled binary for upload */ int size = program.compiled.size; diff --git a/src/gallium/drivers/panfrost/pan_blend_cso.c b/src/gallium/drivers/panfrost/pan_blend_cso.c index 69683098c68..1dd211e6b4c 100644 --- a/src/gallium/drivers/panfrost/pan_blend_cso.c +++ b/src/gallium/drivers/panfrost/pan_blend_cso.c @@ -75,11 +75,12 @@ panfrost_get_blend_shader( /* Prevent NULL collision issues.. */ assert(fmt != 0); - /* Check the cache */ + /* Check the cache. Key by the RT and format */ struct hash_table_u64 *shaders = blend->rt[rt].shaders; + unsigned key = (fmt << 3) | rt; struct panfrost_blend_shader *shader = - _mesa_hash_table_u64_search(shaders, fmt); + _mesa_hash_table_u64_search(shaders, key); if (shader) return shader; @@ -87,10 +88,10 @@ panfrost_get_blend_shader( /* Cache miss. Build one instead, cache it, and go */ struct panfrost_blend_shader generated = - panfrost_compile_blend_shader(ctx, &blend->base, fmt); + panfrost_compile_blend_shader(ctx, &blend->base, fmt, rt); shader = mem_dup(&generated, sizeof(generated)); - _mesa_hash_table_u64_insert(shaders, fmt, shader); + _mesa_hash_table_u64_insert(shaders, key, shader); return shader; } diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.c b/src/gallium/drivers/panfrost/pan_blend_shaders.c index 5d7eb9573eb..62177ccf7e4 100644 --- a/src/gallium/drivers/panfrost/pan_blend_shaders.c +++ b/src/gallium/drivers/panfrost/pan_blend_shaders.c @@ -129,7 +129,8 @@ struct panfrost_blend_shader panfrost_compile_blend_shader( struct panfrost_context *ctx, struct pipe_blend_state *cso, - enum pipe_format format) + enum pipe_format format, + unsigned rt) { struct panfrost_screen *screen = pan_screen(ctx->base.screen); struct panfrost_blend_shader res; @@ -173,7 +174,7 @@ panfrost_compile_blend_shader( /* Compile the built shader */ midgard_program program; - midgard_compile_shader_nir(shader, &program, true, screen->gpu_id); + midgard_compile_shader_nir(shader, &program, true, rt, screen->gpu_id); /* Allow us to patch later */ res.patch_index = program.blend_patch_offset; diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.h b/src/gallium/drivers/panfrost/pan_blend_shaders.h index 88ece5436a4..5931cbc41ce 100644 --- a/src/gallium/drivers/panfrost/pan_blend_shaders.h +++ b/src/gallium/drivers/panfrost/pan_blend_shaders.h @@ -35,6 +35,7 @@ struct panfrost_blend_shader panfrost_compile_blend_shader( struct panfrost_context *ctx, struct pipe_blend_state *cso, - enum pipe_format format); + enum pipe_format format, + unsigned rt); #endif |