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authorAlyssa Rosenzweig <[email protected]>2019-04-05 05:37:37 +0000
committerAlyssa Rosenzweig <[email protected]>2019-04-07 16:01:12 +0000
commit65816ad6e8df9663401ec8f0454228de8e2074e2 (patch)
treeff25050c410995ead0e6a9da65b8173242776fb7 /src/gallium/drivers/panfrost
parent6cba9acb75865183ae887554cc617e2935f68472 (diff)
panfrost/midgard: Add ibitcount8 op
The mechanics of this opcode are a little opaque, but essentially, it's used in 8-bit mode to do a bit count in parallel of a uint and then doing a ton of clever iadd/imov ops to recombine. v2: Correct opcode. Thank you to jernej on IRC for noticing this awkward typo! Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/gallium/drivers/panfrost')
-rw-r--r--src/gallium/drivers/panfrost/midgard/helpers.h1
-rw-r--r--src/gallium/drivers/panfrost/midgard/midgard.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/panfrost/midgard/helpers.h b/src/gallium/drivers/panfrost/midgard/helpers.h
index 6cb00a58d68..4c2be223186 100644
--- a/src/gallium/drivers/panfrost/midgard/helpers.h
+++ b/src/gallium/drivers/panfrost/midgard/helpers.h
@@ -254,6 +254,7 @@ static unsigned alu_opcode_props[256] = {
[midgard_alu_op_ior] = UNITS_ADD,
[midgard_alu_op_ixor] = UNITS_ADD,
[midgard_alu_op_ilzcnt] = UNITS_ADD,
+ [midgard_alu_op_ibitcount8] = UNITS_ADD,
[midgard_alu_op_inot] = UNITS_MOST,
[midgard_alu_op_ishl] = UNITS_ADD,
[midgard_alu_op_iasr] = UNITS_ADD,
diff --git a/src/gallium/drivers/panfrost/midgard/midgard.h b/src/gallium/drivers/panfrost/midgard/midgard.h
index 2698a2b9bc6..6176dfbb1c9 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard.h
+++ b/src/gallium/drivers/panfrost/midgard/midgard.h
@@ -86,6 +86,7 @@ typedef enum {
midgard_alu_op_iandnot = 0x74, /* (a, b) -> a & ~b, used for not/b2f */
midgard_alu_op_ixor = 0x76,
midgard_alu_op_ilzcnt = 0x78, /* Number of zeroes on left. 31 - ilzcnt(x) = findMSB(x) */
+ midgard_alu_op_ibitcount8 = 0x7A, /* Counts bits in 8-bit increments */
midgard_alu_op_imov = 0x7B,
midgard_alu_op_iabs = 0x7C,
midgard_alu_op_feq = 0x80,
@@ -501,6 +502,7 @@ static char *alu_opcode_names[256] = {
[midgard_alu_op_iandnot] = "iandnot",
[midgard_alu_op_ixor] = "ixor",
[midgard_alu_op_ilzcnt] = "ilzcnt",
+ [midgard_alu_op_ibitcount8] = "ibitcount8",
[midgard_alu_op_feq] = "feq",
[midgard_alu_op_fne] = "fne",
[midgard_alu_op_flt] = "flt",