diff options
| author | Alyssa Rosenzweig <[email protected]> | 2020-01-10 13:12:35 -0500 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-01-14 19:42:20 +0000 |
| commit | 6bd9c4dc570c062e9160807fdd5ed888af22fced (patch) | |
| tree | f01d5b2bc1a5d755653ec2c7c563c1e01445715d /src/gallium/drivers/panfrost/pan_sfbd.c | |
| parent | 7c16a1ae4e629ccbae3979ec9be105e6b44e0acf (diff) | |
panfrost: Fix linear depth textures
As pointed out by Boris, what we were calling PAN_LINEAR depth textures
was in fact u-interleaved tiled (!), but we never noticed since we
flipped the flag used for sampling, leading to all sorts of fun bugs
when attempting to directly acess depth textures from the CPU. Which
begs the question -- if what we called LINEAR was tiled, how do we
actually render linear depth textures? It turns out the flags for AFBC
form a mali_block_format 2-bit code just like their render-target
counterparts, so we can render to any of the above.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Reported-by: Boris Brezillon <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>
Diffstat (limited to 'src/gallium/drivers/panfrost/pan_sfbd.c')
| -rw-r--r-- | src/gallium/drivers/panfrost/pan_sfbd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/panfrost/pan_sfbd.c b/src/gallium/drivers/panfrost/pan_sfbd.c index 4647b48ef33..97d00651076 100644 --- a/src/gallium/drivers/panfrost/pan_sfbd.c +++ b/src/gallium/drivers/panfrost/pan_sfbd.c @@ -163,7 +163,7 @@ panfrost_sfbd_set_zsbuf( unsigned level = surf->u.tex.level; assert(surf->u.tex.first_layer == 0); - if (rsrc->layout != PAN_LINEAR) + if (rsrc->layout != PAN_TILED) unreachable("Invalid render layout."); fb->depth_buffer = rsrc->bo->gpu + rsrc->slices[level].offset; |