summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/nv30/nv30_resource.h
diff options
context:
space:
mode:
authorBen Skeggs <[email protected]>2012-01-11 12:42:07 +0100
committerBen Skeggs <[email protected]>2012-04-14 02:56:34 +1000
commita2fc42b899de22273c1df96091bfb5c636075cb0 (patch)
treed3c4981bf8b611e1cea9876e9235b142f7fd39d0 /src/gallium/drivers/nv30/nv30_resource.h
parent6d1cdec3ba151168bfc3aef222fba6265dfb41fb (diff)
nv30: import new driver for GeForce FX/6/7 chipsets, and Quadro variants
The primary motivation for this rewrite was to have a maintainable driver going forward, as nvfx was quite horrible in a lot of ways. The driver is heavily based on the design of the nv50/nvc0 3d drivers we already have, and uses the same common buffer/fence code. It also passes a HEAP more piglit tests than nvfx did, supports a couple more features, and a few more to come still probably. The CPU footprint of this driver is far far less than nvfx, and translates into far greater framerates in a lot of applications (unless you're using a CPU that's way way newer than the GPUs of these generations....) Basically, we once again have a maintained driver for these chipsets \o/ Feel free to report bugs now!
Diffstat (limited to 'src/gallium/drivers/nv30/nv30_resource.h')
-rw-r--r--src/gallium/drivers/nv30/nv30_resource.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/src/gallium/drivers/nv30/nv30_resource.h b/src/gallium/drivers/nv30/nv30_resource.h
new file mode 100644
index 00000000000..6f5d1a86590
--- /dev/null
+++ b/src/gallium/drivers/nv30/nv30_resource.h
@@ -0,0 +1,71 @@
+#ifndef __NV30_RESOURCE_H__
+#define __NV30_RESOURCE_H__
+
+#include "nouveau/nouveau_buffer.h"
+
+void nv30_resource_screen_init(struct pipe_screen *);
+void nv30_resource_init(struct pipe_context *);
+
+struct nv30_surface {
+ struct pipe_surface base;
+ uint32_t offset;
+ uint32_t pitch;
+ uint32_t width;
+ uint16_t height;
+ uint16_t depth;
+};
+
+static INLINE struct nv30_surface *
+nv30_surface(struct pipe_surface *ps)
+{
+ return (struct nv30_surface *)ps;
+}
+
+struct nv30_miptree_level {
+ uint32_t offset;
+ uint32_t pitch;
+ uint32_t zslice_size;
+};
+
+struct nv30_miptree {
+ struct nv04_resource base;
+ struct nv30_miptree_level level[13];
+ uint32_t uniform_pitch;
+ uint32_t layer_size;
+ boolean swizzled;
+ unsigned ms_mode;
+ unsigned ms_x:1;
+ unsigned ms_y:1;
+};
+
+static INLINE struct nv30_miptree *
+nv30_miptree(struct pipe_resource *pt)
+{
+ return (struct nv30_miptree *)pt;
+}
+
+struct pipe_resource *
+nv30_miptree_create(struct pipe_screen *, const struct pipe_resource *);
+
+struct pipe_resource *
+nv30_miptree_from_handle(struct pipe_screen *, const struct pipe_resource *,
+ struct winsys_handle *);
+
+struct pipe_surface *
+nv30_miptree_surface_new(struct pipe_context *, struct pipe_resource *,
+ const struct pipe_surface *);
+
+void
+nv30_miptree_surface_del(struct pipe_context *, struct pipe_surface *);
+
+void
+nv30_resource_copy_region(struct pipe_context *pipe,
+ struct pipe_resource *dst, unsigned dst_level,
+ unsigned dstx, unsigned dsty, unsigned dstz,
+ struct pipe_resource *src, unsigned src_level,
+ const struct pipe_box *src_box);
+
+void
+nv30_resource_resolve(struct pipe_context *, const struct pipe_resolve_info *);
+
+#endif