nvc0: bind shader buffers for compute on Fermi

This is loosely based on 3D. Shader buffers are bound on c15 (the
driver constbuf) at offset 0x200.

Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index afcff537147..bc884d6c08f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -546,6 +546,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
          info->prop.cp.gridInfoBase = NVE4_CP_INPUT_GRID_INFO(0);
       } else {
          info->io.resInfoCBSlot = 15;
+         info->io.suInfoBase = 512;
       }
       info->io.msInfoCBSlot = 0;
       info->io.msInfoBase = NVE4_CP_INPUT_MS_OFFSETS;