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authorSamuel Pitoiset <[email protected]>2016-02-24 21:35:25 +0100
committerSamuel Pitoiset <[email protected]>2016-03-19 18:01:08 +0100
commit902bbda81b31bacb2a8c60ca6a8ba8ca34ae73d3 (patch)
tree539b524ebd1c4e3eca99fec744d97ef5989b8e36 /src/gallium/drivers/nouveau/nvc0/nvc0_program.c
parent26cc411db87f924003f227874d7a047dd8b5e5a4 (diff)
nvc0: avoid using magic numbers for the uniform_bo offsets
Instead make use of constants to improve readability. The first 32 bytes of the driver constant buffer are unknown... This doesn't seem to be used in the codegen part, but if the texBindBase offset is shifted from 0x20 to 0x00, this breaks the universe for really weird reasons. This sounds like to be related to textures. Anyway, name this NVC0_CB_AUX_UNK_INFO and add a todo should be enough for now. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0/nvc0_program.c')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_program.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 48e3475a95f..b7c6faf9cde 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -535,8 +535,8 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
info->io.genUserClip = prog->vp.num_ucps;
info->io.auxCBSlot = 15;
- info->io.ucpBase = 256;
- info->io.drawInfoBase = 256 + 128;
+ info->io.ucpBase = NVC0_CB_AUX_UCP_INFO;
+ info->io.drawInfoBase = NVC0_CB_AUX_DRAW_INFO;
if (prog->type == PIPE_SHADER_COMPUTE) {
if (chipset >= NVISA_GK104_CHIPSET) {
@@ -545,17 +545,17 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
info->io.suInfoBase = NVE4_CP_INPUT_SUF(0);
info->prop.cp.gridInfoBase = NVE4_CP_INPUT_GRID_INFO(0);
} else {
- info->io.suInfoBase = 512;
+ info->io.suInfoBase = NVC0_CB_AUX_BUF_INFO(0);
}
info->io.msInfoCBSlot = 0;
info->io.msInfoBase = NVE4_CP_INPUT_MS_OFFSETS;
} else {
if (chipset >= NVISA_GK104_CHIPSET) {
- info->io.texBindBase = 0x20;
+ info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
info->io.suInfoBase = 0; /* TODO */
}
- info->io.sampleInfoBase = 256 + 128;
- info->io.suInfoBase = 512;
+ info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO;
+ info->io.suInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.msInfoCBSlot = 15;
info->io.msInfoBase = 0; /* TODO */
}