diff options
| author | Ilia Mirkin <[email protected]> | 2017-06-24 00:44:35 -0400 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2018-01-07 11:40:35 -0500 |
| commit | 23a6e8d8ff5effa7b88bd77c3bf396879a2ece0c (patch) | |
| tree | da4107ad5ff1078b4468e86fcdc3854f08787926 /src/gallium/drivers/nouveau/nvc0/nvc0_context.h | |
| parent | 8eb1214755366fc34ed15a7e3dec48d4f0d65f10 (diff) | |
nvc0: add bindless image support for kepler
A part of the driver constbuf area is allocated for bindless images. Any
update requires uploading to all driver constbufs. This also extends the
driver constbuf to 64KB, up from 2KB.
Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0/nvc0_context.h')
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index c5b625ecb45..0729c88dffa 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -108,9 +108,9 @@ /* 6 user uniform buffers, at 64K each */ #define NVC0_CB_USR_INFO(s) (s << 16) #define NVC0_CB_USR_SIZE (6 << 16) -/* 6 driver constbuts, at 2K each */ -#define NVC0_CB_AUX_INFO(s) NVC0_CB_USR_SIZE + (s << 11) -#define NVC0_CB_AUX_SIZE (1 << 11) +/* 6 driver constbuts, at 64K each */ +#define NVC0_CB_AUX_INFO(s) NVC0_CB_USR_SIZE + (s << 16) +#define NVC0_CB_AUX_SIZE (1 << 16) /* XXX: Figure out what this UNK data is. */ #define NVC0_CB_AUX_UNK_INFO 0x000 #define NVC0_CB_AUX_UNK_SIZE (8 * 4) @@ -146,6 +146,9 @@ /* 1 64-bits address and 1 32-bits sequence */ #define NVC0_CB_AUX_MP_INFO 0x620 #define NVC0_CB_AUX_MP_SIZE 3 * 4 +/* 512 64-byte blocks for bindless image handles */ +#define NVC0_CB_AUX_BINDLESS_INFO(i) 0x630 + (i) * 16 * 4 +#define NVC0_CB_AUX_BINDLESS_SIZE (NVE4_IMG_MAX_HANDLES * 16 * 4) /* 4 32-bits floats for the vertex runout, put at the end */ #define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + (NVC0_CB_AUX_SIZE * 6) @@ -355,7 +358,8 @@ void nvc0_validate_textures(struct nvc0_context *); void nvc0_validate_samplers(struct nvc0_context *); void nve4_set_tex_handles(struct nvc0_context *); void nvc0_validate_surfaces(struct nvc0_context *); -void nve4_set_surface_info(struct nouveau_pushbuf *, struct pipe_image_view *, +void nve4_set_surface_info(struct nouveau_pushbuf *, + const struct pipe_image_view *, struct nvc0_context *); void nvc0_mark_image_range_valid(const struct pipe_image_view *); bool nvc0_update_tic(struct nvc0_context *, struct nv50_tic_entry *, |