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authorIlia Mirkin <[email protected]>2016-09-04 18:21:29 -0400
committerIlia Mirkin <[email protected]>2016-09-04 18:28:29 -0400
commit61e978524a0e5de4f8570b44bcb9b907a9187684 (patch)
tree96240f185c40733351c177fcf005fe0636750af5 /src/gallium/drivers/nouveau/codegen
parent98f734e758ee6a7ea0d9b86a0416d0418d2e7fc5 (diff)
gk110/ir: fix quadop dall emission
We recently starting to always emit the NDV (== dall) bit for quadops. However it was folded into the wrong code word. Fixes: e0a067ed48 (nv50/ir: always emit the NDV bit for OP_QUADOP) Signed-off-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index 570b4a9cc6f..8d36799bad4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -1320,8 +1320,8 @@ CodeEmitterGK110::emitTXQ(const TexInstruction *i)
void
CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
{
- code[0] = 0x00000202 | ((qOp & 1) << 31); // dall
- code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
+ code[0] = 0x00000002 | ((qOp & 1) << 31);
+ code[1] = 0x7fc00200 | (qOp >> 1) | (laneMask << 12); // dall
defId(i->def(0), 2);
srcId(i->src(0), 10);