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authorIlia Mirkin <[email protected]>2015-12-03 14:04:06 -0500
committerIlia Mirkin <[email protected]>2015-12-03 23:02:57 -0500
commit49692f86a1b77fac4634d2a3f0502ec7451c3435 (patch)
tree1c8cae041cf81d90be35347778520a400d730e20 /src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
parent51140f452a8623c9b912126b027f0f1819e72531 (diff)
nv50/ir: fix DCE to not generate 96-bit loads
A situation where there's a 128-bit load where the last component gets DCE'd causes a 96-bit load to be generated, which no GPU can actually emit. Avoid generating such instructions by scaling back to 64-bit on the first load when splitting. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0 11.1" <[email protected]>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp')
0 files changed, 0 insertions, 0 deletions