diff options
author | Rafael Antognolli <[email protected]> | 2019-11-04 14:04:25 -0800 |
---|---|---|
committer | Jordan Justen <[email protected]> | 2020-06-22 11:42:00 -0700 |
commit | e6588354360d102f3bfbfdfd484490a6ae296142 (patch) | |
tree | eb7b048078c8281b2a18a24a23d0a1f97e85c469 /src/gallium/drivers/iris/iris_resource.c | |
parent | 762e601f776e7d692f49c328e526e6e2c3b14345 (diff) |
iris/bufmgr: Do not use map_gtt or use set/get_tiling on DG1
We are starting to see platforms that don't support the get/set tiling
uAPI. (For example, DG1.)
Additionally on DG1 we shouldn't be using the map_gtt anymore.
Let's add some asserts and make sure we don't take those paths
accidentally.
Rework:
* Jordan: Only apply for DG1, not all gen12
* Rafael: Use has_tiling_uapi
* Jordan: Copy has_tiling_uapi from devinfo
* Jordan: merge in "iris: Rework iris_bo_import_dmabuf() a little."
* Jordan: Continue to call get/set_tiling on modifier path
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
Diffstat (limited to 'src/gallium/drivers/iris/iris_resource.c')
-rw-r--r-- | src/gallium/drivers/iris/iris_resource.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c index 032e756cd6a..ff5023f7d38 100644 --- a/src/gallium/drivers/iris/iris_resource.c +++ b/src/gallium/drivers/iris/iris_resource.c @@ -865,10 +865,14 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen, /* Use linear for staging buffers */ if (templ->usage == PIPE_USAGE_STAGING || - templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) ) + templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) ) { tiling_flags = ISL_TILING_LINEAR_BIT; - else if (templ->bind & PIPE_BIND_SCANOUT) - tiling_flags = ISL_TILING_X_BIT; + } else if (templ->bind & PIPE_BIND_SCANOUT) { + if (devinfo->has_tiling_uapi) + tiling_flags = ISL_TILING_X_BIT; + else + tiling_flags = ISL_TILING_LINEAR_BIT; + } } isl_surf_usage_flags_t usage = pipe_bind_to_isl_usage(templ->bind); @@ -1027,7 +1031,7 @@ iris_resource_from_handle(struct pipe_screen *pscreen, struct iris_resource *res = iris_alloc_resource(pscreen, templ); const struct isl_drm_modifier_info *mod_inf = isl_drm_modifier_get_info(whandle->modifier); - uint32_t tiling; + int tiling; if (!res) return NULL; @@ -1037,7 +1041,7 @@ iris_resource_from_handle(struct pipe_screen *pscreen, if (mod_inf) tiling = isl_tiling_to_i915_tiling(mod_inf->tiling); else - tiling = I915_TILING_LAST + 1; + tiling = -1; res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle, tiling, whandle->stride); break; |