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authorKeith Whitwell <[email protected]>2009-10-31 20:05:19 +0000
committerKeith Whitwell <[email protected]>2009-10-31 20:05:19 +0000
commite7b76000826ff4faf8bf6a834d55b50a2784c9f2 (patch)
tree271b98513650b01129e9b83e382874ba73da1586 /src/gallium/drivers/i965/brw_pipe_sampler.c
parentf202a34cb1eca41cf5d12bd72016f284bc81ccf8 (diff)
i965g: more work on compilation
Diffstat (limited to 'src/gallium/drivers/i965/brw_pipe_sampler.c')
-rw-r--r--src/gallium/drivers/i965/brw_pipe_sampler.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/gallium/drivers/i965/brw_pipe_sampler.c b/src/gallium/drivers/i965/brw_pipe_sampler.c
index bc20eef6fb2..08a5d220097 100644
--- a/src/gallium/drivers/i965/brw_pipe_sampler.c
+++ b/src/gallium/drivers/i965/brw_pipe_sampler.c
@@ -9,6 +9,38 @@
+/* The brw (and related graphics cores) do not support GL_CLAMP. The
+ * Intel drivers for "other operating systems" implement GL_CLAMP as
+ * GL_CLAMP_TO_EDGE, so the same is done here.
+ */
+static GLuint translate_wrap_mode( unsigned wrap )
+{
+ switch( wrap ) {
+ case PIPE_TEX_WRAP_REPEAT:
+ return BRW_TEXCOORDMODE_WRAP;
+
+ case PIPE_TEX_WRAP_CLAMP:
+ case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
+ return BRW_TEXCOORDMODE_CLAMP;
+
+ case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
+ return BRW_TEXCOORDMODE_CLAMP_BORDER;
+
+ case PIPE_TEX_WRAP_MIRROR_REPEAT:
+ return BRW_TEXCOORDMODE_MIRROR;
+
+ case PIPE_TEX_WRAP_MIRROR_CLAMP:
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
+ return BRW_TEXCOORDMODE_MIRROR_ONCE;
+
+ default:
+ return BRW_TEXCOORDMODE_WRAP;
+ }
+}
+
+
+
static void *brw_create_sampler_state( struct pipe_context *pipe,
const struct pipe_sampler_state *templ )
{