diff options
| author | Jonathan Marek <[email protected]> | 2020-04-21 12:14:23 -0400 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-04-22 18:46:46 +0000 |
| commit | a92d2e11095d9f1f8bc1188fd3d2b8391acc4591 (patch) | |
| tree | 9c4b47ddc2ccac739d642fc4c500843ea210e854 /src/gallium/drivers/freedreno | |
| parent | 83b2f1d8cf53ec7f9defa2acdae313cdacb303af (diff) | |
turnip: implement VK_EXT_sample_locations
Passes tests in:
dEQP-VK.pipeline.multisample.sample_locations_ext.*
Note that these tests fail because of gl_PrimitiveID not working correctly:
dEQP-VK.pipeline.multisample.sample_locations_ext.verify_location.*
Signed-off-by: Jonathan Marek <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4665>
Diffstat (limited to 'src/gallium/drivers/freedreno')
| -rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 10 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 9 |
2 files changed, 3 insertions, 16 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index 8fcb603bfa1..024b139d130 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -1322,17 +1322,13 @@ fd6_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring) WRITE(REG_A6XX_PC_UNKNOWN_9981, 0x3); WRITE(REG_A6XX_PC_UNKNOWN_9E72, 0); WRITE(REG_A6XX_VPC_UNKNOWN_9108, 0x3); - WRITE(REG_A6XX_SP_TP_UNKNOWN_B304, 0); + WRITE(REG_A6XX_SP_TP_SAMPLE_CONFIG, 0); /* NOTE blob seems to (mostly?) use 0xb2 for SP_TP_UNKNOWN_B309 * but this seems to kill texture gather offsets. */ WRITE(REG_A6XX_SP_TP_UNKNOWN_B309, 0xa2); - WRITE(REG_A6XX_RB_UNKNOWN_8804, 0); - WRITE(REG_A6XX_GRAS_UNKNOWN_80A4, 0); - WRITE(REG_A6XX_GRAS_UNKNOWN_80A5, 0); - WRITE(REG_A6XX_GRAS_UNKNOWN_80A6, 0); - WRITE(REG_A6XX_RB_UNKNOWN_8805, 0); - WRITE(REG_A6XX_RB_UNKNOWN_8806, 0); + WRITE(REG_A6XX_RB_SAMPLE_CONFIG, 0); + WRITE(REG_A6XX_GRAS_SAMPLE_CONFIG, 0); WRITE(REG_A6XX_RB_UNKNOWN_8878, 0); WRITE(REG_A6XX_RB_UNKNOWN_8879, 0); WRITE(REG_A6XX_HLSQ_CONTROL_5_REG, 0xfc); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index f56b3422d55..b42287486a8 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -889,15 +889,6 @@ fd6_emit_tile_prep(struct fd_batch *batch, const struct fd_tile *tile) OUT_PKT7(ring, CP_SET_MODE, 1); OUT_RING(ring, 0x0); - - OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8804, 1); - OUT_RING(ring, 0x0); - - OUT_PKT4(ring, REG_A6XX_SP_TP_UNKNOWN_B304, 1); - OUT_RING(ring, 0x0); - - OUT_PKT4(ring, REG_A6XX_GRAS_UNKNOWN_80A4, 1); - OUT_RING(ring, 0x0); } else { set_window_offset(ring, x1, y1); |