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authorKristian H. Kristensen <[email protected]>2019-12-09 19:31:26 -0800
committerKristian H. Kristensen <[email protected]>2019-12-11 22:25:47 +0000
commit8a4b0d852c1f28c302e0df6fa63dbc08a32bc683 (patch)
treeb4cba9b5cee5ece9e8ee7287ac01df9f0fe35c69 /src/gallium/drivers/freedreno
parent201caa7281d714a44d50de5ab1dd2fe37e75795c (diff)
freedreno/a6xx: Convert gmem blits to OUT_REG()
Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c46
1 files changed, 13 insertions, 33 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 13d84d8d8ac..3cde00d4d05 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -979,19 +979,14 @@ emit_blit(struct fd_batch *batch,
fd_msaa_samples(rsc->base.nr_samples);
uint32_t tile_mode = fd_resource_tile_mode(&rsc->base, psurf->u.tex.level);
- OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 5);
- OUT_RING(ring,
- A6XX_RB_BLIT_DST_INFO_TILE_MODE(tile_mode) |
- A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |
- A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(format) |
- A6XX_RB_BLIT_DST_INFO_COLOR_SWAP(swap) |
- COND(ubwc_enabled, A6XX_RB_BLIT_DST_INFO_FLAGS));
- OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* RB_BLIT_DST_LO/HI */
- OUT_RING(ring, A6XX_RB_BLIT_DST_PITCH(stride).value);
- OUT_RING(ring, A6XX_RB_BLIT_DST_ARRAY_PITCH(size).value);
-
- OUT_PKT4(ring, REG_A6XX_RB_BLIT_BASE_GMEM, 1);
- OUT_RING(ring, base);
+ OUT_REG(ring,
+ A6XX_RB_BLIT_DST_INFO(.tile_mode = tile_mode, .samples = samples,
+ .color_format = format, .color_swap = swap, .flags = ubwc_enabled),
+ A6XX_RB_BLIT_DST(.bo = rsc->bo, .bo_offset = offset),
+ A6XX_RB_BLIT_DST_PITCH(.a6xx_rb_blit_dst_pitch = stride),
+ A6XX_RB_BLIT_DST_ARRAY_PITCH(.a6xx_rb_blit_dst_array_pitch = size));
+
+ OUT_REG(ring, A6XX_RB_BLIT_BASE_GMEM(.dword = base));
if (ubwc_enabled) {
OUT_PKT4(ring, REG_A6XX_RB_BLIT_FLAG_DST_LO, 3);
@@ -1009,27 +1004,12 @@ emit_restore_blit(struct fd_batch *batch,
struct pipe_surface *psurf,
unsigned buffer)
{
- uint32_t info = 0;
- bool stencil = false;
+ bool stencil = (buffer == FD_BUFFER_STENCIL);
- switch (buffer) {
- case FD_BUFFER_COLOR:
- info |= A6XX_RB_BLIT_INFO_UNK0;
- break;
- case FD_BUFFER_STENCIL:
- info |= A6XX_RB_BLIT_INFO_UNK0;
- stencil = true;
- break;
- case FD_BUFFER_DEPTH:
- info |= A6XX_RB_BLIT_INFO_DEPTH | A6XX_RB_BLIT_INFO_UNK0;
- break;
- }
-
- if (util_format_is_pure_integer(psurf->format))
- info |= A6XX_RB_BLIT_INFO_INTEGER;
-
- OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
- OUT_RING(ring, info | A6XX_RB_BLIT_INFO_GMEM);
+ OUT_REG(ring, A6XX_RB_BLIT_INFO(
+ .gmem = true, .unk0 = true,
+ .depth = (buffer == FD_BUFFER_DEPTH),
+ .integer = util_format_is_pure_integer(psurf->format)));
emit_blit(batch, ring, base, psurf, stencil);
}