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authorRob Clark <[email protected]>2015-04-16 15:35:50 -0400
committerRob Clark <[email protected]>2015-04-17 11:40:14 -0400
commit95e68adcd9f2589ae6d998328c72b84ffc49edc7 (patch)
tree6f22fc178e205c65a631abd4fc1e8a751a192466 /src/gallium/drivers/freedreno/ir3
parentefbf14e8936384ab1d243afbe3fa9bb0f40e3898 (diff)
freedreno/ir3/nir: few little fixes
isaml needs to scale up coords based on LoD. Also fix bogus bary.f varying # when there are non-bary frag shader inputs. And use sub.s of a positive immediate rather than add.s of negative (since CP is better about figuring out that those can be collapsed into the cat2 instr). Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c49
1 files changed, 28 insertions, 21 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 0b42cd70381..e5f6c2a5e83 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -566,13 +566,13 @@ create_frag_coord(struct ir3_compile *ctx, unsigned comp)
* to subtract (integer) 8 and divide by 16 (right-
* shift by 4) then convert to float:
*
- * add.s tmp, src, -8
+ * sub.s tmp, src, 8
* shr.b tmp, tmp, 4
* mov.u32f32 dst, tmp
*
*/
- instr = ir3_ADD_S(block, ctx->frag_coord[comp], 0,
- create_immed(block, -8), 0);
+ instr = ir3_SUB_S(block, ctx->frag_coord[comp], 0,
+ create_immed(block, 8), 0);
instr = ir3_SHR_B(block, instr, 0,
create_immed(block, 4), 0);
instr = ir3_COV(block, instr, TYPE_U32, TYPE_F32);
@@ -1381,6 +1381,29 @@ emit_tex(struct ir3_compile *ctx, nir_tex_instr *tex)
}
}
+ switch (tex->op) {
+ case nir_texop_tex: opc = OPC_SAM; break;
+ case nir_texop_txb: opc = OPC_SAMB; break;
+ case nir_texop_txl: opc = OPC_SAML; break;
+ case nir_texop_txd: opc = OPC_SAMGQ; break;
+ case nir_texop_txf: opc = OPC_ISAML; break;
+ case nir_texop_txf_ms:
+ case nir_texop_txs:
+ case nir_texop_lod:
+ case nir_texop_tg4:
+ case nir_texop_query_levels:
+ compile_error(ctx, "Unhandled NIR tex type: %d\n", tex->op);
+ return;
+ }
+
+ tex_info(tex, &flags, &coords);
+
+ /* scale up integer coords for TXF based on the LOD */
+ if (opc == OPC_ISAML) {
+ assert(has_lod);
+ for (i = 0; i < coords; i++)
+ coord[i] = ir3_SHL_B(b, coord[i], 0, lod, 0);
+ }
/*
* lay out the first argument in the proper order:
* - actual coordinates first
@@ -1392,8 +1415,6 @@ emit_tex(struct ir3_compile *ctx, nir_tex_instr *tex)
* bias/lod go into the second arg
*/
- tex_info(tex, &flags, &coords);
-
/* insert tex coords: */
for (i = 0; i < coords; i++)
src0[nsrc0++] = coord[i];
@@ -1450,21 +1471,6 @@ emit_tex(struct ir3_compile *ctx, nir_tex_instr *tex)
src1[nsrc1++] = lod;
}
- switch (tex->op) {
- case nir_texop_tex: opc = OPC_SAM; break;
- case nir_texop_txb: opc = OPC_SAMB; break;
- case nir_texop_txl: opc = OPC_SAML; break;
- case nir_texop_txd: opc = OPC_SAMGQ; break;
- case nir_texop_txf: opc = OPC_ISAML; break;
- case nir_texop_txf_ms:
- case nir_texop_txs:
- case nir_texop_lod:
- case nir_texop_tg4:
- case nir_texop_query_levels:
- compile_error(ctx, "Unhandled NIR tex type: %d\n", tex->op);
- return;
- }
-
switch (tex->dest_type) {
case nir_type_invalid:
case nir_type_float:
@@ -1694,7 +1700,8 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
so->inputs[n].bary = true;
- instr = create_frag_input(ctx, idx, use_ldlv);
+ instr = create_frag_input(ctx,
+ so->inputs[n].inloc + i - 8, use_ldlv);
}
} else {
instr = create_input(ctx->block, NULL, idx);