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authorRob Clark <[email protected]>2015-02-04 16:07:44 -0500
committerRob Clark <[email protected]>2015-03-08 17:42:43 -0400
commit17754b70d78649f29e25dfe938de91d64dbf5ebf (patch)
tree6f63a5d88a8dc20e2e144cab89b923dbc12007b1 /src/gallium/drivers/freedreno/ir3/ir3_dump.c
parentf8f7548f466509bf881db1826ef6dd23ffe2acdf (diff)
freedreno/ir3: drop deref nodes
The meta-deref instruction doesn't really do what we need for relative destination. Instead, since each instruction can reference at most a single address value, track the dependency on the address register via instr->address. This lets us express the dependency regardless of whether it is used for dst and/or src. The foreach_ssa_src{_n} iterator macros now also iterates the address register so, at least in SSA form, the address register behaves as an additional virtual src to the instruction. Which is pretty much what we want, as far as scheduling/etc. TODO: For now, the foreach_src{_n} iterators are unchanged. We could wrap the address in an ir3_register and make the foreach_src_{_n} iterators behave the same way. But that seems unnecessary at this point, since we mainly care about the address dependency when in SSA form. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/ir3/ir3_dump.c')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_dump.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_dump.c b/src/gallium/drivers/freedreno/ir3/ir3_dump.c
index 42a38d7511e..a846777b879 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_dump.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_dump.c
@@ -58,9 +58,6 @@ static void dump_instr_name(struct ir3_dump_ctx *ctx,
case OPC_META_PHI:
fprintf(ctx->f, "&#934;");
break;
- case OPC_META_DEREF:
- fprintf(ctx->f, "(*)");
- break;
default:
/* shouldn't hit here.. just for debugging: */
switch (instr->opc) {
@@ -171,8 +168,7 @@ static void dump_instr(struct ir3_dump_ctx *ctx,
ir3_block_dump(ctx, instr->flow.else_block, "else");
if (reg->flags & IR3_REG_SSA)
dump_instr(ctx, reg->instr);
- } else if ((instr->opc == OPC_META_PHI) ||
- (instr->opc == OPC_META_DEREF)) {
+ } else if (instr->opc == OPC_META_PHI) {
/* treat like a normal instruction: */
ir3_instr_dump(ctx, instr);
}
@@ -234,8 +230,7 @@ static void dump_link2(struct ir3_dump_ctx *ctx,
printdef(ctx, defer, "output%lx:<out%u>:w -> %s",
PTRID(instr->inout.block),
instr->regs[0]->num, target);
- } else if ((instr->opc == OPC_META_PHI) ||
- (instr->opc == OPC_META_DEREF)) {
+ } else if (instr->opc == OPC_META_PHI) {
/* treat like a normal instruction: */
printdef(ctx, defer, "instr%lx:<dst0> -> %s", PTRID(instr), target);
}
@@ -412,6 +407,13 @@ ir3_dump_instr_single(struct ir3_instruction *instr)
dump_reg_name(&ctx, reg, !!i);
}
+ if (instr->address) {
+ fprintf(ctx.f, ", address=_");
+ fprintf(ctx.f, "[");
+ dump_instr_name(&ctx, instr->address);
+ fprintf(ctx.f, "]");
+ }
+
if (is_meta(instr) && (instr->opc == OPC_META_FO))
printf(", off=%d", instr->fo.off);