diff options
| author | Rob Clark <[email protected]> | 2019-07-26 09:55:14 -0700 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2019-08-02 10:24:14 -0700 |
| commit | de3e130fc9cdd894b413fa769658960a210f8b74 (patch) | |
| tree | 3a4b9f52d05f0df48aed9a9d37c64e57f566878e /src/gallium/drivers/freedreno/a6xx/fd6_context.c | |
| parent | 401f532bea2bec0bdfc4bebd3b8849fd0e8f78e3 (diff) | |
freedreno/a6xx: VSC overflow detection/handling
Check VSC_SIZE/VSC_SIZE2 regs from cmdstream to detect overflow, and
skip use of VSC visibility stream when overflow is detected, to avoid
GPU hangs. This is done w/ introduction of some CP_REG_TEST/
CP_COND_REG_EXEC packet pairs.
In addition, eventually (after a frame or two) detect the condition and
resize the VSC buffers until overflow no longer happens.
Note that this significantly reduces the initial size of the VSC
buffers, backing out a previous hack to make them 16x larger than
what should be typically required (the previous "solution" for
VSC overflow).
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a6xx/fd6_context.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_context.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c b/src/gallium/drivers/freedreno/a6xx/fd6_context.c index cb848fc20fc..f2e8e4eaf3d 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c @@ -50,8 +50,10 @@ fd6_context_destroy(struct pipe_context *pctx) fd_context_destroy(pctx); - fd_bo_del(fd6_ctx->vsc_data); - fd_bo_del(fd6_ctx->vsc_data2); + if (fd6_ctx->vsc_data) + fd_bo_del(fd6_ctx->vsc_data); + if (fd6_ctx->vsc_data2) + fd_bo_del(fd6_ctx->vsc_data2); fd_bo_del(fd6_ctx->control_mem); fd_context_cleanup_common_vbos(&fd6_ctx->base); @@ -116,13 +118,11 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) pctx->delete_rasterizer_state = fd6_rasterizer_state_delete; pctx->delete_depth_stencil_alpha_state = fd6_depth_stencil_alpha_state_delete; - fd6_ctx->vsc_data = fd_bo_new(screen->dev, - (A6XX_VSC_DATA_PITCH * 32) + 0x100, - DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data"); - - fd6_ctx->vsc_data2 = fd_bo_new(screen->dev, - A6XX_VSC_DATA2_PITCH * 32, - DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data2"); + /* initial sizes for VSC buffers (or rather the per-pipe sizes + * which is used to derive entire buffer size: + */ + fd6_ctx->vsc_data_pitch = 0x440; + fd6_ctx->vsc_data2_pitch = 0x1040; fd6_ctx->control_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM, "control"); |