diff options
| author | Rob Clark <[email protected]> | 2017-08-24 09:30:25 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2017-10-24 12:56:51 -0400 |
| commit | 9c32333a58e2792a062bd82374ea88222d718959 (patch) | |
| tree | 3a5649e90a3b7d1796906d480f4330a89e0f2d2b /src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | |
| parent | 7e7096307aff680160f7924cf972718b404c6c88 (diff) | |
freedreno: rename pipe -> vsc_pipe
To add context priority support we need to have an fd_pipe per context,
rather than per-screen. Which conflicts with existing ctx->pipe (which
is actually a visibility stream pipe (hw resource). So just rename it.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a5xx/fd5_gmem.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index c623b572be5..d8d79217d5b 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -275,7 +275,7 @@ update_vsc_pipe(struct fd_batch *batch) OUT_PKT4(ring, REG_A5XX_VSC_PIPE_CONFIG_REG(0), 16); for (i = 0; i < 16; i++) { - struct fd_vsc_pipe *pipe = &ctx->pipe[i]; + struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i]; OUT_RING(ring, A5XX_VSC_PIPE_CONFIG_REG_X(pipe->x) | A5XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) | A5XX_VSC_PIPE_CONFIG_REG_W(pipe->w) | @@ -284,7 +284,7 @@ update_vsc_pipe(struct fd_batch *batch) OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO(0), 32); for (i = 0; i < 16; i++) { - struct fd_vsc_pipe *pipe = &ctx->pipe[i]; + struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i]; if (!pipe->bo) { pipe->bo = fd_bo_new(ctx->dev, 0x20000, DRM_FREEDRENO_GEM_TYPE_KMEM); @@ -294,7 +294,7 @@ update_vsc_pipe(struct fd_batch *batch) OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_LENGTH_REG(0), 16); for (i = 0; i < 16; i++) { - struct fd_vsc_pipe *pipe = &ctx->pipe[i]; + struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i]; OUT_RING(ring, fd_bo_size(pipe->bo) - 32); /* VSC_PIPE_DATA_LENGTH[i] */ } } @@ -434,7 +434,7 @@ fd5_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) A5XX_RB_RESOLVE_CNTL_2_Y(y2)); if (use_hw_binning(batch)) { - struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p]; + struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p]; OUT_PKT7(ring, CP_WAIT_FOR_ME, 0); |