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authorIlia Mirkin <[email protected]>2015-08-24 23:31:00 -0400
committerEmil Velikov <[email protected]>2015-08-31 13:16:23 +0100
commit94205d0aa229d0cbfb9a5f9ed0cbd1cb07ba9d33 (patch)
treecd2544bef944f738a037cac87cafef02dcdaf5f5 /src/gallium/drivers/freedreno/a3xx
parent1b40221850d41b622e66f7bbea0eed6594b85c4a (diff)
freedreno/a3xx: add basic clip plane support
The hardware is capable of dealing with GL1-style user clip planes. No clip vertex, no clip distances. Fixes a number of ucp tests, as well as neverball. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]> (cherry picked from commit 58e24b4761ec8c348bf6825c2355a6e047599306)
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 752e7f88cb9..6f514ed05df 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -563,10 +563,29 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
val |= COND(fp->writes_pos, A3XX_GRAS_CL_CLIP_CNTL_ZCLIP_DISABLE);
val |= COND(fp->frag_coord, A3XX_GRAS_CL_CLIP_CNTL_ZCOORD |
A3XX_GRAS_CL_CLIP_CNTL_WCOORD);
+ /* TODO only use if prog doesn't use clipvertex/clipdist */
+ val |= MIN2(util_bitcount(ctx->rasterizer->clip_plane_enable), 6) << 26;
OUT_PKT0(ring, REG_A3XX_GRAS_CL_CLIP_CNTL, 1);
OUT_RING(ring, val);
}
+ if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_UCP)) {
+ uint32_t planes = ctx->rasterizer->clip_plane_enable;
+ int count = 0;
+
+ while (planes && count < 6) {
+ int i = ffs(planes) - 1;
+
+ planes &= ~(1U << i);
+ fd_wfi(ctx, ring);
+ OUT_PKT0(ring, REG_A3XX_GRAS_CL_USER_PLANE(count++), 4);
+ OUT_RING(ring, fui(ctx->ucp.ucp[i][0]));
+ OUT_RING(ring, fui(ctx->ucp.ucp[i][1]));
+ OUT_RING(ring, fui(ctx->ucp.ucp[i][2]));
+ OUT_RING(ring, fui(ctx->ucp.ucp[i][3]));
+ }
+ }
+
/* NOTE: since primitive_restart is not actually part of any
* state object, we need to make sure that we always emit
* PRIM_VTX_CNTL.. either that or be more clever and detect