diff options
author | Marek Olšák <[email protected]> | 2017-08-19 22:23:08 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-08-22 13:29:47 +0200 |
commit | 985e6b5ef91ec8de7ae5e03fcfb978ea6e8993ea (patch) | |
tree | dc0d1343692b0fd7889905db57dbe85c728554eb /src/gallium/auxiliary/tgsi | |
parent | 3e2ff8fade879cedfdff0e180a6996df1223a823 (diff) |
gallium: remove TGSI opcode XPD
use MUL+MAD+MOV instead.
Reviewed-by: Roland Scheidegger <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi')
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_exec.c | 49 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_info.c | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_lowering.c | 69 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_lowering.h | 1 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h | 1 |
5 files changed, 1 insertions, 121 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index c9265fbfdae..bce158b42af 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -3313,51 +3313,6 @@ exec_scs(struct tgsi_exec_machine *mach, } static void -exec_xpd(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_exec_channel r[6]; - union tgsi_exec_channel d[3]; - - fetch_source(mach, &r[0], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT); - fetch_source(mach, &r[1], &inst->Src[1], TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT); - - micro_mul(&r[2], &r[0], &r[1]); - - fetch_source(mach, &r[3], &inst->Src[0], TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT); - fetch_source(mach, &r[4], &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT); - - micro_mul(&r[5], &r[3], &r[4] ); - micro_sub(&d[TGSI_CHAN_X], &r[2], &r[5]); - - fetch_source(mach, &r[2], &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - - micro_mul(&r[3], &r[3], &r[2]); - - fetch_source(mach, &r[5], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - - micro_mul(&r[1], &r[1], &r[5]); - micro_sub(&d[TGSI_CHAN_Y], &r[3], &r[1]); - - micro_mul(&r[5], &r[5], &r[4]); - micro_mul(&r[0], &r[0], &r[2]); - micro_sub(&d[TGSI_CHAN_Z], &r[5], &r[0]); - - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { - store_dest(mach, &d[TGSI_CHAN_X], &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { - store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT); - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { - store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT); - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { - store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT); - } -} - -static void exec_dst(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) { @@ -5153,10 +5108,6 @@ exec_instruction( exec_scalar_binary(mach, inst, micro_pow, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; - case TGSI_OPCODE_XPD: - exec_xpd(mach, inst); - break; - case TGSI_OPCODE_COS: exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index b2477940b9a..17f56fd9b74 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -68,7 +68,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 1, 1, 0, 0, 0, 0, 0, REPL, "EX2", TGSI_OPCODE_EX2 }, { 1, 1, 0, 0, 0, 0, 0, REPL, "LG2", TGSI_OPCODE_LG2 }, { 1, 2, 0, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW }, - { 1, 2, 0, 0, 0, 0, 0, COMP, "XPD", TGSI_OPCODE_XPD }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "", 31 }, /* removed */ { 1, 1, 0, 0, 0, 0, 0, COMP, "U2I64", TGSI_OPCODE_U2I64 }, { 1, 0, 0, 0, 0, 0, 0, OTHR, "CLOCK", TGSI_OPCODE_CLOCK }, { 1, 1, 0, 0, 0, 0, 0, COMP, "I2I64", TGSI_OPCODE_I2I64 }, diff --git a/src/gallium/auxiliary/tgsi/tgsi_lowering.c b/src/gallium/auxiliary/tgsi/tgsi_lowering.c index f3b5ade2269..fa9d579f77b 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_lowering.c +++ b/src/gallium/auxiliary/tgsi/tgsi_lowering.c @@ -258,65 +258,6 @@ transform_dst(struct tgsi_transform_context *tctx, } } -/* XPD - Cross Product - * dst.x = src0.y \times src1.z - src1.y \times src0.z - * dst.y = src0.z \times src1.x - src1.z \times src0.x - * dst.z = src0.x \times src1.y - src1.x \times src0.y - * dst.w = 1.0 - * - * ; needs: 1 tmp, imm{1.0} - * MUL tmpA.xyz, src1.yzx, src0.zxy - * MAD dst.xyz, src0.yzx, src1.zxy, -tmpA.xyz - * MOV dst.w, imm{1.0} - */ -#define XPD_GROW (NINST(2) + NINST(3) + NINST(1) - OINST(2)) -#define XPD_TMP 1 -static void -transform_xpd(struct tgsi_transform_context *tctx, - struct tgsi_full_instruction *inst) -{ - struct tgsi_lowering_context *ctx = tgsi_lowering_context(tctx); - struct tgsi_full_dst_register *dst = &inst->Dst[0]; - struct tgsi_full_src_register *src0 = &inst->Src[0]; - struct tgsi_full_src_register *src1 = &inst->Src[1]; - struct tgsi_full_instruction new_inst; - - if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZ) { - /* MUL tmpA.xyz, src1.yzx, src0.zxy */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_MUL; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ); - new_inst.Instruction.NumSrcRegs = 2; - reg_src(&new_inst.Src[0], src1, SWIZ(Y, Z, X, _)); - reg_src(&new_inst.Src[1], src0, SWIZ(Z, X, Y, _)); - tctx->emit_instruction(tctx, &new_inst); - - /* MAD dst.xyz, src0.yzx, src1.zxy, -tmpA.xyz */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZ); - new_inst.Instruction.NumSrcRegs = 3; - reg_src(&new_inst.Src[0], src0, SWIZ(Y, Z, X, _)); - reg_src(&new_inst.Src[1], src1, SWIZ(Z, X, Y, _)); - reg_src(&new_inst.Src[2], &ctx->tmp[A].src, SWIZ(X, Y, Z, _)); - new_inst.Src[2].Register.Negate = true; - tctx->emit_instruction(tctx, &new_inst); - } - - if (dst->Register.WriteMask & TGSI_WRITEMASK_W) { - /* MOV dst.w, imm{1.0} */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_MOV; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_W); - new_inst.Instruction.NumSrcRegs = 1; - reg_src(&new_inst.Src[0], &ctx->imm, SWIZ(_, _, _, Y)); - tctx->emit_instruction(tctx, &new_inst); - } -} - /* SCS - Sine Cosine * dst.x = \cos{src.x} * dst.y = \sin{src.x} @@ -1466,11 +1407,6 @@ transform_instr(struct tgsi_transform_context *tctx, goto skip; transform_dst(tctx, inst); break; - case TGSI_OPCODE_XPD: - if (!ctx->config->lower_XPD) - goto skip; - transform_xpd(tctx, inst); - break; case TGSI_OPCODE_SCS: if (!ctx->config->lower_SCS) goto skip; @@ -1599,7 +1535,6 @@ tgsi_transform_lowering(const struct tgsi_lowering_config *config, #define OPCS(x) ((config->lower_ ## x) ? info->opcode_count[TGSI_OPCODE_ ## x] : 0) /* if there are no instructions to lower, then we are done: */ if (!(OPCS(DST) || - OPCS(XPD) || OPCS(SCS) || OPCS(LRP) || OPCS(FRC) || @@ -1629,10 +1564,6 @@ tgsi_transform_lowering(const struct tgsi_lowering_config *config, newlen += DST_GROW * OPCS(DST); numtmp = MAX2(numtmp, DST_TMP); } - if (OPCS(XPD)) { - newlen += XPD_GROW * OPCS(XPD); - numtmp = MAX2(numtmp, XPD_TMP); - } if (OPCS(SCS)) { newlen += SCS_GROW * OPCS(SCS); numtmp = MAX2(numtmp, SCS_TMP); diff --git a/src/gallium/auxiliary/tgsi/tgsi_lowering.h b/src/gallium/auxiliary/tgsi/tgsi_lowering.h index f65d915c654..709a63a601b 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_lowering.h +++ b/src/gallium/auxiliary/tgsi/tgsi_lowering.h @@ -55,7 +55,6 @@ struct tgsi_lowering_config * enable lowering of TGSI_OPCODE_<opc> */ unsigned lower_DST:1; - unsigned lower_XPD:1; unsigned lower_SCS:1; unsigned lower_LRP:1; unsigned lower_FRC:1; diff --git a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h index 68b4af81b71..111edf3ca01 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h +++ b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h @@ -63,7 +63,6 @@ OP11(ROUND) OP11(EX2) OP11(LG2) OP12(POW) -OP12(XPD) OP11(COS) OP11(DDX) OP11(DDY) |