diff options
author | Rob Clark <[email protected]> | 2016-01-21 13:36:37 -0500 |
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committer | Rob Clark <[email protected]> | 2016-02-09 17:30:33 -0500 |
commit | ead05e8670c4626a1d4ea03a6a60b5019188e1e2 (patch) | |
tree | 0b09f48b26633fabb7e657cf54885991a090671b /src/gallium/auxiliary/nir | |
parent | b1770235ed74814a4f5d03fe3e93e59c38a3686b (diff) |
ttn: use const_index helpers
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/nir')
-rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 89c16650b0a..61ff0a74379 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -615,7 +615,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index, nir_ssa_def *offset; if (op == nir_intrinsic_load_ubo) { - /* UBO loads don't have a const_index[0] base offset. */ + /* UBO loads don't have a base offset. */ offset = nir_imm_int(b, index); if (indirect) { offset = nir_iadd(b, offset, ttn_src_for_indirect(c, indirect)); @@ -623,7 +623,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index, /* UBO offsets are in bytes, but TGSI gives them to us in vec4's */ offset = nir_ishl(b, offset, nir_imm_int(b, 4)); } else { - load->const_index[0] = index; + nir_intrinsic_set_base(load, index); if (indirect) { offset = ttn_src_for_indirect(c, indirect); } else { @@ -1875,7 +1875,7 @@ ttn_emit_instruction(struct ttn_compile *c) &tgsi_dst->Indirect : NULL; store->num_components = 4; - store->const_index[0] = dest.write_mask; + nir_intrinsic_set_write_mask(store, dest.write_mask); store->variables[0] = ttn_array_deref(c, store, var, offset, indirect); store->src[0] = nir_src_for_reg(dest.dest.reg.reg); @@ -1907,8 +1907,8 @@ ttn_add_output_stores(struct ttn_compile *c) store->num_components = 4; store->src[0].reg.reg = c->output_regs[loc].reg; store->src[0].reg.base_offset = c->output_regs[loc].offset; - store->const_index[0] = loc; - store->const_index[1] = 0xf; /* writemask */ + nir_intrinsic_set_base(store, loc); + nir_intrinsic_set_write_mask(store, 0xf); store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); nir_builder_instr_insert(b, &store->instr); } |