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authorRob Clark <[email protected]>2017-05-15 13:31:44 -0400
committerRob Clark <[email protected]>2017-05-16 16:34:21 -0400
commit12aa1d15d5b30c49ee424e50a20cadcb7c3ac0c9 (patch)
tree3c6644f8ea64a1e472b091a4f0ba071eb7d5e3b8 /src/gallium/auxiliary/nir
parent2216a95946cda54227bdb04f2fc92ad9695014ce (diff)
ttn: fix dest size for some texture instructions
Some, like lod, don't return 4 components. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/nir')
-rw-r--r--src/gallium/auxiliary/nir/tgsi_to_nir.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index bdcf218c975..d4914acb7d7 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1464,7 +1464,9 @@ ttn_tex(struct ttn_compile *c, nir_alu_dest dest, nir_ssa_def **src)
assert(src_number == num_srcs);
- nir_ssa_dest_init(&instr->instr, &instr->dest, 4, 32, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest,
+ nir_tex_instr_dest_size(instr),
+ 32, NULL);
nir_builder_instr_insert(b, &instr->instr);
/* Resolve the writemask on the texture op. */