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authorKristian H. Kristensen <[email protected]>2019-09-19 17:13:34 -0700
committerKristian H. Kristensen <[email protected]>2019-11-07 16:36:28 -0800
commit7fed7c2a7d2fcb3fbb490ad5fbc2db270c33a1f1 (patch)
tree91672079ce16b1fc479fd9d1d84ce694c6d5e18b /src/freedreno
parentb0b443dcab09a913e5fc2ea5a61d89e6ccbd4c35 (diff)
freedreno/a6xx: Clear sysmem with CP_BLIT
Signed-off-by: Kristian H. Kristensen <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/freedreno')
-rw-r--r--src/freedreno/registers/a6xx.xml4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml
index 858f2f3c94c..4763c47b7d1 100644
--- a/src/freedreno/registers/a6xx.xml
+++ b/src/freedreno/registers/a6xx.xml
@@ -963,6 +963,7 @@ to upconvert to 32b float internally?
<value value="0x4" name="R2D_FLOAT32"/>
<value value="0x3" name="R2D_FLOAT16"/>
<value value="0x1" name="R2D_UNORM8_SRGB"/>
+ <value value="0x0" name="R2D_RAW"/>
</enum>
<domain name="A6XX" width="32">
@@ -2009,6 +2010,9 @@ to upconvert to 32b float internally?
<bitfield name="SOLID_COLOR" pos="7" type="boolean"/>
<bitfield name="COLOR_FORMAT" low="8" high="15" type="a6xx_color_fmt"/>
<bitfield name="SCISSOR" pos="16" type="boolean"/>
+
+ <bitfield name="UNK" low="17" high="18" type="uint"/>
+
<!-- required when blitting D24S8/D24X8 -->
<bitfield name="D24S8" pos="19" type="boolean"/>
<!-- some sort of channel mask, disabled channels are set to zero ? -->