diff options
| author | Daniel Schürmann <[email protected]> | 2019-01-26 09:12:46 +0100 |
|---|---|---|
| committer | Daniel Schürmann <[email protected]> | 2019-06-24 18:42:20 +0200 |
| commit | 165b7f3a4487e7ab7738dd9b37f2b3375692f8a2 (patch) | |
| tree | 9a077679a17a8e48b43f7cb67b22ec7e737948b4 /src/freedreno/ir3/ir3_nir.c | |
| parent | a74f256c58a2c1fca3ce75e5199a04a22768450e (diff) | |
nir: define behavior of nir_op_bfm and nir_op_u/ibfe according to SM5 spec.
That is: the five least significant bits provide the values of
'bits' and 'offset' which is the case for all hardware currently
supported by NIR and using the bfm/bfe instructions.
This patch also changes the lowering of bitfield_insert/extract
using shifts to not use bfm and removes the flag 'lower_bfm'.
Tested-by: Eric Anholt <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
Diffstat (limited to 'src/freedreno/ir3/ir3_nir.c')
| -rw-r--r-- | src/freedreno/ir3/ir3_nir.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c index 1ef47aa3e06..320e485b98d 100644 --- a/src/freedreno/ir3/ir3_nir.c +++ b/src/freedreno/ir3/ir3_nir.c @@ -54,7 +54,6 @@ static const nir_shader_compiler_options options = { .lower_helper_invocation = true, .lower_bitfield_insert_to_shifts = true, .lower_bitfield_extract_to_shifts = true, - .lower_bfm = true, .use_interpolated_input_intrinsics = true, }; @@ -79,7 +78,6 @@ static const nir_shader_compiler_options options_a6xx = { .lower_helper_invocation = true, .lower_bitfield_insert_to_shifts = true, .lower_bitfield_extract_to_shifts = true, - .lower_bfm = true, .use_interpolated_input_intrinsics = true, }; |