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authorConnor Abbott <[email protected]>2020-03-18 18:06:41 +0100
committerMarge Bot <[email protected]>2020-04-09 15:56:55 +0000
commitde7d90ef53d585ee3efd165df1bf38b20794b3e6 (patch)
tree1cb8bdb8d58ec02457e0c1f97170bdef3611dbf7 /src/freedreno/ir3/ir3_delay.c
parentc8b0f904398cdc30ffc67c162bc3f570bf887ed9 (diff)
ir3: Plumb through support for a1.x
This will need to be used in some cases for the upcoming bindless support, plus ldc.k instructions which push data from a UBO to const registers. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
Diffstat (limited to 'src/freedreno/ir3/ir3_delay.c')
-rw-r--r--src/freedreno/ir3/ir3_delay.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/freedreno/ir3/ir3_delay.c b/src/freedreno/ir3/ir3_delay.c
index 5839128a4c6..3fc4d911f14 100644
--- a/src/freedreno/ir3/ir3_delay.c
+++ b/src/freedreno/ir3/ir3_delay.c
@@ -82,7 +82,7 @@ ir3_delayslots(struct ir3_instruction *assigner,
if (is_meta(assigner) || is_meta(consumer))
return 0;
- if (writes_addr(assigner))
+ if (writes_addr0(assigner) || writes_addr1(assigner))
return 6;
/* On a6xx, it takes the number of delay slots to get a SFU result