diff options
| author | Hyunjun Ko <[email protected]> | 2020-05-07 06:06:59 +0000 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-05-08 17:45:03 +0000 |
| commit | 094c7646a3ae4980f76605a922572fe2ed78f6f1 (patch) | |
| tree | 5a33b702839a74969ce74456055fb4b18d03ed91 /src/freedreno/ir3/ir3_compiler_nir.c | |
| parent | ab5590e92bc36e2b785a088751c433d31989d778 (diff) | |
freedreno,tu: Don't request fragcoord components not being read.
v1. Replace the existed bool type with new bitfield and edit register
files to take a mask instead of duplicating codes to do masking.
v2. Use fragcoord_compmask != 0 instead of fragcoord_compmask > 0 since
it represents a bitfield.
Tested with
dEQP-VK.glsl.builtin_var.simple.fragcoord_xyz/w
dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz/w
Closes: #2680
Signed-off-by: Hyunjun Ko <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4723>
Diffstat (limited to 'src/freedreno/ir3/ir3_compiler_nir.c')
| -rw-r--r-- | src/freedreno/ir3/ir3_compiler_nir.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index b3d0556a03e..d40978f574b 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1411,7 +1411,7 @@ get_barycentric_pixel(struct ir3_context *ctx) } static struct ir3_instruction * -get_frag_coord(struct ir3_context *ctx) +get_frag_coord(struct ir3_context *ctx, nir_intrinsic_instr *intr) { if (!ctx->frag_coord) { struct ir3_block *b = ctx->in_block; @@ -1436,9 +1436,11 @@ get_frag_coord(struct ir3_context *ctx) } ctx->frag_coord = ir3_create_collect(ctx, xyzw, 4); - ctx->so->frag_coord = true; } + ctx->so->fragcoord_compmask |= + nir_ssa_def_components_read(&intr->dest.ssa); + return ctx->frag_coord; } @@ -1599,7 +1601,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) emit_intrinsic_load_ubo_ldc(ctx, intr, dst); break; case nir_intrinsic_load_frag_coord: - ir3_split_dest(b, dst, get_frag_coord(ctx), 0, 4); + ir3_split_dest(b, dst, get_frag_coord(ctx, intr), 0, 4); break; case nir_intrinsic_load_sample_pos_from_id: { /* NOTE: blob seems to always use TYPE_F16 and then cov.f16f32, |