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authorJason Ekstrand <[email protected]>2019-02-08 17:56:52 -0600
committerJason Ekstrand <[email protected]>2019-04-19 19:56:42 +0000
commit2edf29b933564d4f1aae80b91f674f1175f91625 (patch)
tree8ee215d444bad8228fa701f0cbbf839a3cde943d /src/compiler/nir/nir_lower_tex.c
parentbd56ce8ce5045a181b9fc8a7f24251931e343f9c (diff)
intel,nir: Lower TXD with a bindless sampler
When we have a bindless sampler, we need an instruction header. Even in SIMD8, this pushes the instruction over the sampler message size maximum of 11 registers. Instead, we have to lower TXD to TXL. Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Diffstat (limited to 'src/compiler/nir/nir_lower_tex.c')
-rw-r--r--src/compiler/nir/nir_lower_tex.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c
index 8a37ec9a650..c5762b860fd 100644
--- a/src/compiler/nir/nir_lower_tex.c
+++ b/src/compiler/nir/nir_lower_tex.c
@@ -1100,6 +1100,8 @@ nir_lower_tex_block(nir_block *block, nir_builder *b,
(options->lower_txd_shadow && tex->is_shadow) ||
(options->lower_txd_shadow_clamp && tex->is_shadow && has_min_lod) ||
(options->lower_txd_offset_clamp && has_offset && has_min_lod) ||
+ (options->lower_txd_clamp_bindless_sampler && has_min_lod &&
+ nir_tex_instr_src_index(tex, nir_tex_src_sampler_handle) != -1) ||
(options->lower_txd_clamp_if_sampler_index_not_lt_16 &&
has_min_lod && !sampler_index_lt(tex, 16)) ||
(options->lower_txd_cube_map &&