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authorEric Anholt <[email protected]>2019-03-04 22:11:15 -0800
committerEric Anholt <[email protected]>2019-03-05 07:36:24 -0800
commitfd1d22b92edbf98e2ec10c880b2703bfdb0f3b62 (patch)
tree395d27c691ce1e105182ea352f6f09098687cb9a /src/broadcom/compiler/nir_to_vir.c
parentc6ae666cf5a731118147bb6e88eb520140445e7a (diff)
v3d: Stop treating exec masking specially.
In our backend, the successor edges from the blocks only point to where QPU control flow goes, not where the notional control flow goes from a "break" or "continue" modifying the execution mask to resume writing to some channels later. As a result, this attempt at restricting live ranges ended up missing the live range of a value where a conditional break/continue was present in a loop before the later def of a variable. The previous commit ended up fixing the problem that the flag tried to solve. Fixes glsl-vs-loop-continue.shader_test and/or glsl-vs-loop-redundant-condition.shader_test based on register allocation results.
Diffstat (limited to 'src/broadcom/compiler/nir_to_vir.c')
-rw-r--r--src/broadcom/compiler/nir_to_vir.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index 5d2c872f2aa..d4f6088bcf2 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -405,7 +405,6 @@ ntq_store_dest(struct v3d_compile *c, nir_dest *dest, int chan,
c->cursor = vir_after_inst(last_inst);
vir_set_cond(last_inst, V3D_QPU_COND_IFA);
- last_inst->cond_is_exec_mask = true;
}
}
}